3294 void X86Assembler::shll(Register operand, Register shifter) {  in shll()  argument
3295   EmitGenericShift(4, Operand(operand), shifter);  in shll()
3314 void X86Assembler::shrl(Register operand, Register shifter) {  in shrl()  argument
3315   EmitGenericShift(5, Operand(operand), shifter);  in shrl()
3334 void X86Assembler::sarl(Register operand, Register shifter) {  in sarl()  argument
3335   EmitGenericShift(7, Operand(operand), shifter);  in sarl()
3390 void X86Assembler::roll(Register operand, Register shifter) {  in roll()  argument
3391   EmitGenericShift(0, Operand(operand), shifter);  in roll()
3400 void X86Assembler::rorl(Register operand, Register shifter) {  in rorl()  argument
3401   EmitGenericShift(1, Operand(operand), shifter);  in rorl()
3741 void X86Assembler::EmitOperand(int reg_or_opcode, const Operand& operand) {  in EmitOperand()  argument
3744   const int length = operand.length_;  in EmitOperand()
3747   CHECK_EQ(operand.encoding_[0] & 0x38, 0);  in EmitOperand()
3748   EmitUint8(operand.encoding_[0] + (reg_or_opcode << 3));  in EmitOperand()
3751     EmitUint8(operand.encoding_[i]);  in EmitOperand()
3753   AssemblerFixup* fixup = operand.GetFixup();  in EmitOperand()
3771                                const Operand& operand,  in EmitComplex()  argument
3779     EmitOperand(reg_or_opcode, operand);  in EmitComplex()
3781   } else if (operand.IsRegister(EAX)) {  in EmitComplex()
3787     EmitOperand(reg_or_opcode, operand);  in EmitComplex()
3828                                     const Operand& operand,  in EmitGenericShift()  argument
3834     EmitOperand(reg_or_opcode, operand);  in EmitGenericShift()
3837     EmitOperand(reg_or_opcode, operand);  in EmitGenericShift()
3844                                     const Operand& operand,  in EmitGenericShift()  argument
3849   EmitOperand(reg_or_opcode, operand);  in EmitGenericShift()
3951                                            X86ManagedRegister operand,  in EmitVexPrefixByteOne()  argument
3963   if (operand.IsNoRegister()) {  in EmitVexPrefixByteOne()
3965   } else if (operand.IsXmmRegister()) {  in EmitVexPrefixByteOne()
3966     XmmRegister vvvv = operand.AsXmmRegister();  in EmitVexPrefixByteOne()
3970   } else if (operand.IsCpuRegister()) {  in EmitVexPrefixByteOne()
3971     Register vvvv = operand.AsCpuRegister();  in EmitVexPrefixByteOne()
3985                                            X86ManagedRegister operand,  in EmitVexPrefixByteTwo()  argument
3996   if (operand.IsXmmRegister()) {  in EmitVexPrefixByteTwo()
3997     XmmRegister vvvv = operand.AsXmmRegister();  in EmitVexPrefixByteTwo()
4001   } else if (operand.IsCpuRegister()) {  in EmitVexPrefixByteTwo()
4002     Register vvvv = operand.AsCpuRegister();  in EmitVexPrefixByteTwo()