Lines Matching refs:reg

115   bool IsRegister(CpuRegister reg) const {  in IsRegister()  argument
117 && ((encoding_[0] & 0x07) == reg.LowBits()) // Register codes match. in IsRegister()
118 && (reg.NeedsRex() == ((rex_ & 1) != 0)); // REX.000B bits match. in IsRegister()
174 explicit Operand(CpuRegister reg) : rex_(0), length_(0), fixup_(nullptr) { SetModRM(3, reg); } in Operand() argument
368 void call(CpuRegister reg);
372 void pushq(CpuRegister reg);
376 void popq(CpuRegister reg);
671 void psllw(XmmRegister reg, const Immediate& shift_count);
672 void pslld(XmmRegister reg, const Immediate& shift_count);
673 void psllq(XmmRegister reg, const Immediate& shift_count);
675 void psraw(XmmRegister reg, const Immediate& shift_count);
676 void psrad(XmmRegister reg, const Immediate& shift_count);
679 void psrlw(XmmRegister reg, const Immediate& shift_count);
680 void psrld(XmmRegister reg, const Immediate& shift_count);
681 void psrlq(XmmRegister reg, const Immediate& shift_count);
682 void psrldq(XmmRegister reg, const Immediate& shift_count);
714 void xchgl(CpuRegister reg, const Address& address);
719 void cmpl(CpuRegister reg, const Immediate& imm);
721 void cmpl(CpuRegister reg, const Address& address);
722 void cmpl(const Address& address, CpuRegister reg);
731 void testl(CpuRegister reg, const Address& address);
732 void testl(CpuRegister reg, const Immediate& imm);
735 void testq(CpuRegister reg, const Address& address);
742 void andl(CpuRegister reg, const Address& address);
745 void andq(CpuRegister reg, const Address& address);
749 void orl(CpuRegister reg, const Address& address);
752 void orq(CpuRegister reg, const Address& address);
756 void xorl(CpuRegister reg, const Address& address);
759 void xorq(CpuRegister reg, const Address& address);
762 void addl(CpuRegister reg, const Immediate& imm);
763 void addl(CpuRegister reg, const Address& address);
764 void addl(const Address& address, CpuRegister reg);
768 void addq(CpuRegister reg, const Immediate& imm);
773 void subl(CpuRegister reg, const Immediate& imm);
774 void subl(CpuRegister reg, const Address& address);
776 void subq(CpuRegister reg, const Immediate& imm);
783 void idivl(CpuRegister reg);
784 void idivq(CpuRegister reg);
787 void imull(CpuRegister reg, const Immediate& imm);
789 void imull(CpuRegister reg, const Address& address);
793 void imulq(CpuRegister reg, const Immediate& imm);
794 void imulq(CpuRegister reg, const Address& address);
795 void imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm);
797 void imull(CpuRegister reg);
800 void mull(CpuRegister reg);
803 void shll(CpuRegister reg, const Immediate& imm);
805 void shrl(CpuRegister reg, const Immediate& imm);
807 void sarl(CpuRegister reg, const Immediate& imm);
810 void shlq(CpuRegister reg, const Immediate& imm);
812 void shrq(CpuRegister reg, const Immediate& imm);
814 void sarq(CpuRegister reg, const Immediate& imm);
817 void negl(CpuRegister reg);
818 void negq(CpuRegister reg);
820 void notl(CpuRegister reg);
821 void notq(CpuRegister reg);
837 void jmp(CpuRegister reg);
843 void cmpxchgl(const Address& address, CpuRegister reg);
844 void cmpxchgq(const Address& address, CpuRegister reg);
874 void rorl(CpuRegister reg, const Immediate& imm);
876 void roll(CpuRegister reg, const Immediate& imm);
879 void rorq(CpuRegister reg, const Immediate& imm);
881 void rolq(CpuRegister reg, const Immediate& imm);
895 void AddImmediate(CpuRegister reg, const Immediate& imm);
899 void LockCmpxchgl(const Address& address, CpuRegister reg) { in LockCmpxchgl() argument
900 lock()->cmpxchgl(address, reg); in LockCmpxchgl()
903 void LockCmpxchgq(const Address& address, CpuRegister reg) { in LockCmpxchgq() argument
904 lock()->cmpxchgq(address, reg); in LockCmpxchgq()
956 void PoisonHeapReference(CpuRegister reg) { negl(reg); } in PoisonHeapReference() argument
958 void UnpoisonHeapReference(CpuRegister reg) { negl(reg); } in UnpoisonHeapReference() argument
960 void MaybePoisonHeapReference(CpuRegister reg) { in MaybePoisonHeapReference() argument
962 PoisonHeapReference(reg); in MaybePoisonHeapReference()
966 void MaybeUnpoisonHeapReference(CpuRegister reg) { in MaybeUnpoisonHeapReference() argument
968 UnpoisonHeapReference(reg); in MaybeUnpoisonHeapReference()
978 void EmitRegisterOperand(uint8_t rm, uint8_t reg);
979 void EmitXmmRegisterOperand(uint8_t rm, XmmRegister reg);
991 void EmitGenericShift(bool wide, int rm, CpuRegister reg, const Immediate& imm);
998 void EmitOptionalRex32(CpuRegister reg);
1009 void EmitRex64(CpuRegister reg);
1057 inline void X86_64Assembler::EmitRegisterOperand(uint8_t rm, uint8_t reg) { in EmitRegisterOperand() argument
1060 buffer_.Emit<uint8_t>((0xC0 | (reg & 7)) + (rm << 3)); in EmitRegisterOperand()
1063 inline void X86_64Assembler::EmitXmmRegisterOperand(uint8_t rm, XmmRegister reg) { in EmitXmmRegisterOperand() argument
1064 EmitRegisterOperand(rm, static_cast<uint8_t>(reg.AsFloatRegister())); in EmitXmmRegisterOperand()