Lines Matching refs:x0

6     mov      x0, xPC                       // arg0: Instruction* inst
12     cbz      x0, MterpPossibleException
37    add      x0, xSELF, #THREAD_INTERPRETER_CACHE_OFFSET       // cache address
39    add      x0, x0, x1, lsl #4            // entry address within the cache
40    ldp      x0, x1, [x0]                  // entry key (pc) and value (offset)
43    cmp      x0, xPC
48      ldr      x0, [x2, x1]                // x0<- obj.field
69      SET_VREG_WIDE x0, w2                 // fp[A]<- x0
152     ldr     x0, [x3, x4]                // x0<- obj.field
154     SET_VREG_WIDE x0, w2
208     add     x0, xFP, #OFF_FP_SHADOWFRAME
247     GET_VREG_WIDE x0, w0                // x0<- fp[A]
249     str     x0, [x2, x3]                // obj.field<- x0
259     add     x0, xFP, #OFF_FP_SHADOWFRAME