1 /*
2  * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef __DENVER_H__
8 #define __DENVER_H__
9 
10 /* MIDR values for Denver */
11 #define DENVER_MIDR_PN0			U(0x4E0F0000)
12 #define DENVER_MIDR_PN1			U(0x4E0F0010)
13 #define DENVER_MIDR_PN2			U(0x4E0F0020)
14 #define DENVER_MIDR_PN3			U(0x4E0F0030)
15 #define DENVER_MIDR_PN4			U(0x4E0F0040)
16 
17 /* Implementer code in the MIDR register */
18 #define DENVER_IMPL			U(0x4E)
19 
20 /* CPU state ids - implementation defined */
21 #define DENVER_CPU_STATE_POWER_DOWN	U(0x3)
22 
23 #ifndef __ASSEMBLY__
24 
25 /* Disable Dynamic Code Optimisation */
26 void denver_disable_dco(void);
27 
28 #endif
29 
30 #endif /* __DENVER_H__ */
31