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2 * Copyright (C) 2018 Cadence Design Systems, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files (the
6 * "Software"), to use this Software with Cadence processor cores only and
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9 *
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20 
21 ******************************************************************************/
22 
23 /*******************************************************************************
24  * xf-config.h
25  *
26  * Xtensa target configuration parameters
27  *
28  *******************************************************************************/
29 
30 /* ...number of DSP cores */
31 #define XF_CFG_CORES_NUM                1
32 
33 /* ...size of the internal message pool (make it equal to at least ring-buffer) */
34 #define XF_CFG_MESSAGE_POOL_SIZE        256
35 
36 /* ...local IPC is coherent (say) */
37 #define XF_LOCAL_IPC_NON_COHERENT       0
38 
39 /* ...remote IPC is non coherent (say) */
40 #define XF_REMOTE_IPC_NON_COHERENT      1
41 
42 /* ...size of the local memory pool (in bytes) */
43 #define XF_CFG_LOCAL_POOL_SIZE          (1024 << 10)
44 
45 /* ...size of the shared memory pool (in bytes) */
46 #if 1//def XAF_ENABLE_NON_HIKEY
47 #define XF_CFG_REMOTE_IPC_POOL_SIZE     (256 << 10)
48 #else
49 #define XF_CFG_REMOTE_IPC_POOL_SIZE     (HIFI_MUSIC_DATA_SIZE)
50 #endif
51 
52 /* ...size of the local memory pool (in bytes) */
53 #define XF_CFG_LOCAL_IPC_POOL_SIZE      (1024 << 10)
54 #ifdef XAF_ENABLE_NON_HIKEY
55 /* ...maximal size of scratch memory is 80 KB */
56 #define XF_CFG_CODEC_SCRATCHMEM_SIZE    (80 << 10)
57 #else
58 /* ...maximal size of scratch memory is 56 KB */
59 #define XF_CFG_CODEC_SCRATCHMEM_SIZE    (56 << 10)
60 #endif
61 
62 /* ...scratch memory is 8-bytes aligned */
63 #define XF_CFG_CODEC_SCRATCHMEM_ALIGN   8
64