1 /*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <arch_helpers.h>
8 #include <mmio.h>
9 #include <tegra_def.h>
10 #include <tegra_platform.h>
11 #include <tegra_private.h>
12
13 /*******************************************************************************
14 * Tegra platforms
15 ******************************************************************************/
16 typedef enum tegra_platform {
17 TEGRA_PLATFORM_SILICON = 0,
18 TEGRA_PLATFORM_QT,
19 TEGRA_PLATFORM_FPGA,
20 TEGRA_PLATFORM_EMULATION,
21 TEGRA_PLATFORM_MAX,
22 } tegra_platform_t;
23
24 /*******************************************************************************
25 * Tegra macros defining all the SoC minor versions
26 ******************************************************************************/
27 #define TEGRA_MINOR_QT 0
28 #define TEGRA_MINOR_FPGA 1
29 #define TEGRA_MINOR_EMULATION_MIN 2
30 #define TEGRA_MINOR_EMULATION_MAX 10
31
32 /*******************************************************************************
33 * Tegra major, minor version helper macros
34 ******************************************************************************/
35 #define MAJOR_VERSION_SHIFT 0x4
36 #define MAJOR_VERSION_MASK 0xF
37 #define MINOR_VERSION_SHIFT 0x10
38 #define MINOR_VERSION_MASK 0xF
39 #define CHIP_ID_SHIFT 8
40 #define CHIP_ID_MASK 0xFF
41
42 /*******************************************************************************
43 * Tegra chip ID values
44 ******************************************************************************/
45 typedef enum tegra_chipid {
46 TEGRA_CHIPID_TEGRA13 = 0x13,
47 TEGRA_CHIPID_TEGRA21 = 0x21,
48 TEGRA_CHIPID_TEGRA18 = 0x18,
49 } tegra_chipid_t;
50
51 /*
52 * Read the chip ID value
53 */
tegra_get_chipid(void)54 static uint32_t tegra_get_chipid(void)
55 {
56 return mmio_read_32(TEGRA_MISC_BASE + HARDWARE_REVISION_OFFSET);
57 }
58
59 /*
60 * Read the chip's major version from chip ID value
61 */
tegra_get_chipid_major(void)62 uint32_t tegra_get_chipid_major(void)
63 {
64 return (tegra_get_chipid() >> MAJOR_VERSION_SHIFT) & MAJOR_VERSION_MASK;
65 }
66
67 /*
68 * Read the chip's minor version from the chip ID value
69 */
tegra_get_chipid_minor(void)70 uint32_t tegra_get_chipid_minor(void)
71 {
72 return (tegra_get_chipid() >> MINOR_VERSION_SHIFT) & MINOR_VERSION_MASK;
73 }
74
tegra_chipid_is_t132(void)75 uint8_t tegra_chipid_is_t132(void)
76 {
77 uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK;
78
79 return (chip_id == TEGRA_CHIPID_TEGRA13);
80 }
81
tegra_chipid_is_t210(void)82 uint8_t tegra_chipid_is_t210(void)
83 {
84 uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK;
85
86 return (chip_id == TEGRA_CHIPID_TEGRA21);
87 }
88
tegra_chipid_is_t186(void)89 uint8_t tegra_chipid_is_t186(void)
90 {
91 uint32_t chip_id = (tegra_get_chipid() >> CHIP_ID_SHIFT) & CHIP_ID_MASK;
92
93 return (chip_id == TEGRA_CHIPID_TEGRA18);
94 }
95
96 /*
97 * Read the chip ID value and derive the platform
98 */
tegra_get_platform(void)99 static tegra_platform_t tegra_get_platform(void)
100 {
101 uint32_t major = tegra_get_chipid_major();
102 uint32_t minor = tegra_get_chipid_minor();
103
104 /* Actual silicon platforms have a non-zero major version */
105 if (major > 0)
106 return TEGRA_PLATFORM_SILICON;
107
108 /*
109 * The minor version number is used by simulation platforms
110 */
111
112 /*
113 * Cadence's QuickTurn emulation system is a Solaris-based
114 * chip emulation system
115 */
116 if (minor == TEGRA_MINOR_QT)
117 return TEGRA_PLATFORM_QT;
118
119 /*
120 * FPGAs are used during early software/hardware development
121 */
122 if (minor == TEGRA_MINOR_FPGA)
123 return TEGRA_PLATFORM_FPGA;
124
125 /* Minor version reserved for other emulation platforms */
126 if ((minor > TEGRA_MINOR_FPGA) && (minor <= TEGRA_MINOR_EMULATION_MAX))
127 return TEGRA_PLATFORM_EMULATION;
128
129 /* unsupported platform */
130 return TEGRA_PLATFORM_MAX;
131 }
132
tegra_platform_is_silicon(void)133 uint8_t tegra_platform_is_silicon(void)
134 {
135 return (tegra_get_platform() == TEGRA_PLATFORM_SILICON);
136 }
137
tegra_platform_is_qt(void)138 uint8_t tegra_platform_is_qt(void)
139 {
140 return (tegra_get_platform() == TEGRA_PLATFORM_QT);
141 }
142
tegra_platform_is_fpga(void)143 uint8_t tegra_platform_is_fpga(void)
144 {
145 return (tegra_get_platform() == TEGRA_PLATFORM_FPGA);
146 }
147
tegra_platform_is_emulation(void)148 uint8_t tegra_platform_is_emulation(void)
149 {
150 return (tegra_get_platform() == TEGRA_PLATFORM_EMULATION);
151 }
152