Searched refs:LR (Results 1 – 9 of 9) sorted by relevance
41 LR = 30 enumerator51 } else if (reg.GetCode() == LR) { in AppendRegisterNameToOutput()
48 LR = 14, enumerator
32 (1 << art::arm::LR);
543 ldr lr, [sp, #56] @ Load LR from gprs_, 56 = 4 * 14.
74 Arm64ManagedRegister::FromXRegister(LR),128 Arm64ManagedRegister::FromXRegister(LR),344 static_assert((kCoreCalleeSpillMask >> LR) == 1u); // Contains LR as the highest bit. in CalleeSaveRegisters()347 Arm64ManagedRegister::FromXRegister(LR))); in CalleeSaveRegisters()
78 ArmManagedRegister::FromCoreRegister(LR),135 ArmManagedRegister::FromCoreRegister(LR),461 static_assert((kCoreCalleeSpillMask >> LR) == 1u); // Contains LR as the highest bit. in CalleeSaveRegisters()464 ArmManagedRegister::FromCoreRegister(LR))); in CalleeSaveRegisters()
68 LR = X30, enumerator
36 (1 << art::arm64::LR);
631 EXPECT_TRUE(vixl::aarch64::lr.Is(Arm64Assembler::reg_x(LR))); in TEST()