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Searched refs:S8 (Results 1 – 7 of 7) sorted by relevance

/art/runtime/arch/arm/
Dregisters_arm.h66 S8 = 8, enumerator
Dcontext_arm.cc90 fprs_[S8] = nullptr; in SmashCallerSaves()
Dcallee_save_frame_arm.h49 (1 << art::arm::S8) | (1 << art::arm::S9) | (1 << art::arm::S10) | (1 << art::arm::S11) |
/art/runtime/arch/arm64/
Dregisters_arm64.h162 S8 = 8, enumerator
/art/compiler/optimizing/
Dcode_generator_vector_arm_vixl.cc179 __ Vneg(DataTypeValue::S8, dst, src); in VisitVecNeg()
207 __ Vabs(DataTypeValue::S8, dst, src); in VisitVecAbs()
316 __ Vqadd(DataTypeValue::S8, dst, lhs, rhs); in VisitVecSaturationAdd()
351 ? __ Vrhadd(DataTypeValue::S8, dst, lhs, rhs) in VisitVecHalvingAdd()
352 : __ Vhadd(DataTypeValue::S8, dst, lhs, rhs); in VisitVecHalvingAdd()
418 __ Vqsub(DataTypeValue::S8, dst, lhs, rhs); in VisitVecSaturationSub()
488 __ Vmin(DataTypeValue::S8, dst, lhs, rhs); in VisitVecMin()
528 __ Vmax(DataTypeValue::S8, dst, lhs, rhs); in VisitVecMax()
695 __ Vshr(DataTypeValue::S8, dst, lhs, value); in VisitVecShr()
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc55 S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, S12, S13, S14, S15
/art/compiler/utils/arm64/
Dmanaged_register_arm64_test.cc714 EXPECT_TRUE(vixl::aarch64::s8.Is(Arm64Assembler::reg_s(S8))); in TEST()