/art/compiler/jni/quick/x86/ |
D | calling_convention_x86.cc | 173 ManagedRegister in_reg = CurrentParamRegister(); in EntrySpills() local 175 if (!in_reg.IsNoRegister()) { in EntrySpills() 178 ManagedRegisterSpill spill(in_reg, size, spill_offset); in EntrySpills() 182 in_reg = CurrentParamHighLongRegister(); in EntrySpills() 183 DCHECK(!in_reg.IsNoRegister()); in EntrySpills() 185 ManagedRegisterSpill spill2(in_reg, size, spill_offset + 4); in EntrySpills()
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/art/compiler/jni/quick/ |
D | jni_compiler.cc | 59 ManagedRegister in_reg); 285 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local 286 __ VerifyObject(in_reg, mr_conv->IsCurrentArgPossiblyNull()); in ArtJniCompileMethodInternal() 287 __ StoreRef(handle_scope_offset, in_reg); in ArtJniCompileMethodInternal() 712 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); in CopyParameter() local 715 __ CreateHandleScopeEntry(out_reg, handle_scope_offset, in_reg, null_allowed); in CopyParameter() 719 __ Move(out_reg, in_reg, mr_conv->CurrentParamSize()); in CopyParameter() 749 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); in CopyParameter() local 762 __ Store(out_off, in_reg, param_size); in CopyParameter() 767 __ StoreSpanning(out_off, in_reg, in_off, mr_conv->InterproceduralScratchRegister()); in CopyParameter() [all …]
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/art/compiler/utils/x86_64/ |
D | jni_macro_assembler_x86_64.cc | 498 X86_64ManagedRegister in_reg = min_reg.AsX86_64(); in CreateHandleScopeEntry() local 499 if (in_reg.IsNoRegister()) { // TODO(64): && null_allowed in CreateHandleScopeEntry() 501 in_reg = out_reg; in CreateHandleScopeEntry() 503 __ movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry() 505 CHECK(in_reg.IsCpuRegister()); in CreateHandleScopeEntry() 507 VerifyObject(in_reg, null_allowed); in CreateHandleScopeEntry() 510 if (!out_reg.Equals(in_reg)) { in CreateHandleScopeEntry() 513 __ testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); in CreateHandleScopeEntry() 545 X86_64ManagedRegister in_reg = min_reg.AsX86_64(); in LoadReferenceFromHandleScope() local 547 CHECK(in_reg.IsCpuRegister()); in LoadReferenceFromHandleScope() [all …]
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D | jni_macro_assembler_x86_64.h | 157 ManagedRegister in_reg,
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/art/compiler/utils/x86/ |
D | jni_macro_assembler_x86.cc | 449 X86ManagedRegister in_reg = min_reg.AsX86(); in CreateHandleScopeEntry() local 450 CHECK(in_reg.IsCpuRegister()); in CreateHandleScopeEntry() 452 VerifyObject(in_reg, null_allowed); in CreateHandleScopeEntry() 455 if (!out_reg.Equals(in_reg)) { in CreateHandleScopeEntry() 458 __ testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); in CreateHandleScopeEntry() 490 X86ManagedRegister in_reg = min_reg.AsX86(); in LoadReferenceFromHandleScope() local 492 CHECK(in_reg.IsCpuRegister()); in LoadReferenceFromHandleScope() 494 if (!out_reg.Equals(in_reg)) { in LoadReferenceFromHandleScope() 497 __ testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); in LoadReferenceFromHandleScope() 499 __ movl(out_reg.AsCpuRegister(), Address(in_reg.AsCpuRegister(), 0)); in LoadReferenceFromHandleScope()
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D | jni_macro_assembler_x86.h | 134 ManagedRegister in_reg, bool null_allowed) override;
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/art/compiler/utils/arm64/ |
D | jni_macro_assembler_arm64.cc | 579 Arm64ManagedRegister in_reg = m_in_reg.AsArm64(); in CreateHandleScopeEntry() local 581 CHECK(in_reg.IsNoRegister() || in_reg.IsXRegister()) << in_reg; in CreateHandleScopeEntry() 587 if (in_reg.IsNoRegister()) { in CreateHandleScopeEntry() 590 in_reg = out_reg; in CreateHandleScopeEntry() 592 ___ Cmp(reg_w(in_reg.AsOverlappingWRegister()), 0); in CreateHandleScopeEntry() 593 if (!out_reg.Equals(in_reg)) { in CreateHandleScopeEntry() 626 Arm64ManagedRegister in_reg = m_in_reg.AsArm64(); in LoadReferenceFromHandleScope() local 628 CHECK(in_reg.IsXRegister()) << in_reg; in LoadReferenceFromHandleScope() 630 if (!out_reg.Equals(in_reg)) { in LoadReferenceFromHandleScope() 634 ___ Cbz(reg_x(in_reg.AsXRegister()), &exit); in LoadReferenceFromHandleScope() [all …]
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D | jni_macro_assembler_arm64.h | 147 ManagedRegister in_reg,
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/art/compiler/jni/quick/x86_64/ |
D | calling_convention_x86_64.cc | 172 ManagedRegister in_reg = CurrentParamRegister(); in EntrySpills() local 173 if (!in_reg.IsNoRegister()) { in EntrySpills() 176 ManagedRegisterSpill spill(in_reg, size, spill_offset); in EntrySpills()
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/art/compiler/utils/arm/ |
D | jni_macro_assembler_arm_vixl.cc | 496 vixl::aarch32::Register in_reg = in CreateHandleScopeEntry() local 504 if (!in_reg.IsValid()) { in CreateHandleScopeEntry() 506 in_reg = out_reg; in CreateHandleScopeEntry() 509 temps.Exclude(in_reg); in CreateHandleScopeEntry() 510 ___ Cmp(in_reg, 0); in CreateHandleScopeEntry() 513 if (!out_reg.Is(in_reg)) { in CreateHandleScopeEntry()
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D | jni_macro_assembler_arm_vixl.h | 165 ManagedRegister in_reg,
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/art/tools/dexanalyze/ |
D | dexanalyze_bytecode.cc | 439 uint32_t in_reg = inst->VRegB_22c(); in ProcessCodeItem() local 445 ExtendPrefix(&in_reg, &local_type); in ProcessCodeItem() 446 CHECK(InstNibbles(new_opcode, {in_reg, out_reg, local_type})); in ProcessCodeItem()
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/art/compiler/utils/ |
D | jni_macro_assembler.h | 182 ManagedRegister in_reg,
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/art/compiler/optimizing/ |
D | intrinsics_arm_vixl.cc | 466 vixl32::SRegister in_reg = InputSRegisterAt(invoke, 0); in VisitMathRoundFloat() local 474 __ Vcvta(S32, F32, temp1, in_reg); in VisitMathRoundFloat() 484 __ Vrinta(F32, temp1, in_reg); in VisitMathRoundFloat() 486 __ Vsub(F32, temp1, in_reg, temp1); in VisitMathRoundFloat()
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