/art/compiler/utils/ |
D | assembler_thumb_test_expected.cc.inc | 17 " 28: f8dd cffc ldr.w ip, [sp, #4092] ; 0xffc\n", 18 " 2c: f50d 5c80 add.w ip, sp, #4096 ; 0x1000\n", 19 " 30: f8dc c000 ldr.w ip, [ip]\n", 20 " 34: f8d9 c200 ldr.w ip, [r9, #512] ; 0x200\n", 21 " 38: f8dc 0080 ldr.w r0, [ip, #128] ; 0x80\n", 27 " 48: f8cd cffc str.w ip, [sp, #4092] ; 0xffc\n", 30 " 54: f8c5 c004 str.w ip, [r5, #4]\n", 32 " 5c: f04f 0cff mov.w ip, #255 ; 0xff\n", 33 " 60: f8cd c030 str.w ip, [sp, #48] ; 0x30\n", 34 " 64: f06f 4c7f mvn.w ip, #4278190080 ; 0xff000000\n", [all …]
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/art/runtime/arch/arm/ |
D | memcmp16_arm.S | 59 ldrh ip, [r1], #2 60 subs r0, r0, ip 78 ldrh ip, [r1], #2 80 subs r0, r0, ip 101 ldr ip, [r1] 110 eors r0, r0, ip 112 ldreq ip, [r1, #4]! 116 eorseq r0, r0, ip 118 ldreq ip, [r1, #4]! 122 eorseq r0, r0, ip [all …]
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D | jni_entrypoints_arm.S | 38 ldr ip, [r0, #THREAD_TOP_QUICK_FRAME_OFFSET] // uintptr_t tagged_quick_frame 39 bic ip, #1 // ArtMethod** sp 40 ldr ip, [ip] // ArtMethod* method 41 ldr ip, [ip, #ART_METHOD_ACCESS_FLAGS_OFFSET] // uint32_t access_flags 42 tst ip, #(ACCESS_FLAGS_METHOD_IS_FAST_NATIVE | ACCESS_FLAGS_METHOD_IS_CRITICAL_NATIVE) 136 add ip, r0, ip // Destination end. 140 cmp r0, ip 144 str lr, [ip, #-__SIZEOF_POINTER__] 146 .cfi_def_cfa ip, FRAME_SIZE_SAVE_REFS_AND_ARGS 152 strd r4, r0, [ip] // r0 in the padding as before. [all …]
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D | quick_entrypoints_arm.S | 132 .cfi_rel_offset ip, 48 570 ands ip, r2, #LOCK_WORD_GC_STATE_MASK_SHIFTED_TOGGLED @ Test the non-gc bits. 733 push {r0-r3, ip, lr} @ 6 words for saved registers (used in art_quick_aput_obj) 739 .cfi_rel_offset ip, 16 759 POP_REG_NE ip, 16, \rDest 784 READ_BARRIER ip, r2, MIRROR_OBJECT_CLASS_OFFSET 786 cmp r3, ip @ value's type == array's component type - trivial assignability 807 mov r1, ip 1540 mov r0, ip // Pass method index. 1613 pop {r0-r3, r4, ip} [all …]
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/art/runtime/interpreter/mterp/arm64/ |
D | other.S | 16 GET_INST_OPCODE ip // extract opcode from rINST 17 GOTO_OPCODE ip // jump to next instruction 32 GET_INST_OPCODE ip // extract opcode from wINST 34 GOTO_OPCODE ip // jump to next instruction 42 GET_INST_OPCODE ip // extract opcode from wINST 43 GOTO_OPCODE ip // jump to next instruction 50 GET_INST_OPCODE ip // ip<- opcode from xINST 52 GOTO_OPCODE ip // execute next instruction 64 GET_INST_OPCODE ip // extract opcode from rINST 65 GOTO_OPCODE ip // jump to next instruction [all …]
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D | floating_point.S | 17 GET_INST_OPCODE ip // extract opcode from rINST 19 GOTO_OPCODE ip // jump to next instruction 34 GET_INST_OPCODE ip // extract opcode from rINST 36 GOTO_OPCODE ip // jump to next instruction 53 GET_INST_OPCODE ip // extract opcode from rINST 55 GOTO_OPCODE ip // jump to next instruction 68 GET_INST_OPCODE ip // extract opcode from rINST 70 GOTO_OPCODE ip // jump to next instruction 93 GET_INST_OPCODE ip // extract opcode from rINST 95 GOTO_OPCODE ip // jump to next instruction [all …]
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D | array.S | 26 GET_INST_OPCODE ip // extract opcode from rINST 28 GOTO_OPCODE ip // jump to next instruction 58 GET_INST_OPCODE ip 59 GOTO_OPCODE ip // jump to next instruction 83 GET_INST_OPCODE ip // extract opcode from wINST 85 GOTO_OPCODE ip // jump to next instruction 112 GET_INST_OPCODE ip // extract opcode from rINST 114 GOTO_OPCODE ip // jump to next instruction 137 GET_INST_OPCODE ip // extract opcode from rINST 138 GOTO_OPCODE ip // jump to next instruction [all …]
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D | object.S | 14 GET_INST_OPCODE ip // extract opcode from rINST 15 GOTO_OPCODE ip // jump to next instruction 32 GET_INST_OPCODE ip // extract opcode from rINST 33 GOTO_OPCODE ip // jump to next instruction 73 GET_INST_OPCODE ip // extract opcode from rINST 74 GOTO_OPCODE ip // jump to next instruction 118 GET_INST_OPCODE ip // extract opcode from wINST 119 GOTO_OPCODE ip // jump to next instruction 133 GET_INST_OPCODE ip // extract opcode from rINST 134 GOTO_OPCODE ip // jump to next instruction [all …]
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D | arithmetic.S | 30 GET_INST_OPCODE ip // extract opcode from rINST 32 GOTO_OPCODE ip // jump to next instruction 61 GET_INST_OPCODE ip // extract opcode from rINST 63 GOTO_OPCODE ip // jump to next instruction 90 GET_INST_OPCODE ip // extract opcode from rINST 92 GOTO_OPCODE ip // jump to next instruction 125 GET_INST_OPCODE ip // extract opcode from rINST 127 GOTO_OPCODE ip // jump to next instruction 156 GET_INST_OPCODE ip // extract opcode from rINST 158 GOTO_OPCODE ip // jump to next instruction [all …]
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D | invoke.S | 18 GET_INST_OPCODE ip 19 GOTO_OPCODE ip 39 GET_INST_OPCODE ip 40 GOTO_OPCODE ip
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D | main.S | 109 #define ip x16 macro 439 GET_INST_OPCODE ip // extract opcode from wINST 440 GOTO_OPCODE ip // jump to next instruction 574 GET_INST_OPCODE ip 575 GOTO_OPCODE ip 613 GET_INST_OPCODE ip // extract opcode from wINST 614 GOTO_OPCODE ip // jump to next instruction 622 GET_INST_OPCODE ip // extract opcode from wINST 623 GOTO_OPCODE ip // jump to next instruction 642 GET_INST_OPCODE ip // extract opcode from wINST [all …]
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D | control_flow.S | 19 GET_INST_OPCODE ip // extract opcode from wINST 20 GOTO_OPCODE ip // jump to next instruction 40 GET_INST_OPCODE ip // extract opcode from wINST 41 GOTO_OPCODE ip // jump to next instruction
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/art/runtime/interpreter/mterp/arm/ |
D | other.S | 17 GET_INST_OPCODE ip @ extract opcode from rINST 18 GOTO_OPCODE ip @ jump to next instruction 33 GET_INST_OPCODE ip @ extract opcode from rINST 35 GOTO_OPCODE ip @ jump to next instruction 43 GET_INST_OPCODE ip @ extract opcode from rINST 44 GOTO_OPCODE ip @ jump to next instruction 51 GET_INST_OPCODE ip @ ip<- opcode from rINST 53 GOTO_OPCODE ip @ execute next instruction 65 GET_INST_OPCODE ip @ extract opcode from rINST 66 GOTO_OPCODE ip @ jump to next instruction [all …]
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D | arithmetic.S | 32 GET_INST_OPCODE ip @ extract opcode from rINST 34 GOTO_OPCODE ip @ jump to next instruction 65 GET_INST_OPCODE ip @ extract opcode from rINST 67 GOTO_OPCODE ip @ jump to next instruction 95 GET_INST_OPCODE ip @ extract opcode from rINST 97 GOTO_OPCODE ip @ jump to next instruction 131 GET_INST_OPCODE ip @ extract opcode from rINST 133 GOTO_OPCODE ip @ jump to next instruction 163 orrs ip, r2, r3 @ second arg (r2-r3) is zero? 166 CLEAR_SHADOW_PAIR rINST, lr, ip @ Zero out the shadow regs [all …]
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D | object.S | 15 GET_INST_OPCODE ip @ extract opcode from rINST 16 GOTO_OPCODE ip @ jump to next instruction 34 GET_INST_OPCODE ip @ extract opcode from rINST 35 GOTO_OPCODE ip @ jump to next instruction 123 GET_INST_OPCODE ip @ extract opcode from rINST 124 GOTO_OPCODE ip @ jump to next instruction 158 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned) 161 CLEAR_SHADOW_PAIR r2, ip, lr @ Zero out the shadow regs 162 GET_INST_OPCODE ip @ extract opcode from rINST 164 GOTO_OPCODE ip @ jump to next instruction [all …]
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D | array.S | 27 GET_INST_OPCODE ip @ extract opcode from rINST 29 GOTO_OPCODE ip @ jump to next instruction 60 GET_INST_OPCODE ip 61 GOTO_OPCODE ip @ jump to next instruction 86 CLEAR_SHADOW_PAIR r9, lr, ip @ Zero out the shadow regs 89 GET_INST_OPCODE ip @ extract opcode from rINST 91 GOTO_OPCODE ip @ jump to next instruction 119 GET_INST_OPCODE ip @ extract opcode from rINST 121 GOTO_OPCODE ip @ jump to next instruction 145 GET_INST_OPCODE ip @ extract opcode from rINST [all …]
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D | invoke.S | 20 GET_INST_OPCODE ip 21 GOTO_OPCODE ip 43 GET_INST_OPCODE ip 44 GOTO_OPCODE ip
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D | control_flow.S | 19 GET_INST_OPCODE ip @ extract opcode from rINST 20 GOTO_OPCODE ip @ jump to next instruction 38 GET_INST_OPCODE ip @ extract opcode from rINST 39 GOTO_OPCODE ip @ jump to next instruction
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D | main.S | 263 add ip, rFP, \vreg, lsl #2 264 strd \regLo, \regHi, [ip] 267 add ip, rREFS, \vreg, lsl #2 268 strd \regLo, \regHi, [ip] 426 GET_INST_OPCODE ip @ extract opcode from rINST 427 GOTO_OPCODE ip @ jump to next instruction 565 GET_INST_OPCODE ip 566 GOTO_OPCODE ip
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D | floating_point.S | 21 GET_INST_OPCODE ip @ extract opcode from rINST 23 GOTO_OPCODE ip @ jump to next instruction 42 GET_INST_OPCODE ip @ extract opcode from rINST
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/art/disassembler/ |
D | disassembler_arm.cc | 217 const uint16_t* const ip = reinterpret_cast<const uint16_t*>(instr_ptr); in Dump() local 220 next = reinterpret_cast<uintptr_t>(disasm_->DecodeT32At(ip, end_address)); in Dump() 222 const uint32_t* const ip = reinterpret_cast<const uint32_t*>(instr_ptr); in Dump() local 223 next = reinterpret_cast<uintptr_t>(disasm_->DecodeA32At(ip)); in Dump()
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/art/compiler/utils/arm/ |
D | assembler_arm_vixl.cc | 307 CHECK(!base.Is(ip)); in LoadFromOffset()
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/art/compiler/optimizing/ |
D | intrinsics_arm_vixl.cc | 218 DCHECK(!src_curr_addr.Is(ip)); in EmitNativeCode() 219 DCHECK(!dst_curr_addr.Is(ip)); in EmitNativeCode() 220 DCHECK(!src_stop_addr.Is(ip)); in EmitNativeCode() 221 DCHECK(!tmp.Is(ip)); in EmitNativeCode()
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D | code_generator_arm_vixl.h | 801 DCHECK(reg < vixl::aarch32::ip.GetCode() && reg != mr.GetCode()) << reg; in CheckValidReg()
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/art/tools/jvmti-agents/ti-fast/ |
D | tifast.cc | 359 jint* ip,
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