| /art/compiler/utils/arm/ |
| D | managed_register_arm.cc | 29 Register low = AsRegisterPairLow(); in Overlaps() local
31 return ArmManagedRegister::FromCoreRegister(low).Overlaps(other) || in Overlaps()
37 SRegister low = AsOverlappingDRegisterLow(); in Overlaps() local
40 return (low == other_sreg) || (high == other_sreg); in Overlaps()
54 int low; in AllocIdLow() local
57 low = (r * 2) + kNumberOfCoreRegIds; // Return a SRegister. in AllocIdLow()
60 low = (r - kNumberOfDRegIds) * 2; // Return a Register. in AllocIdLow()
61 if (low > 6) { in AllocIdLow()
63 low = 1; in AllocIdLow()
66 return low; in AllocIdLow()
|
| /art/tools/ahat/src/main/com/android/ahat/ |
| D | HtmlEscaper.java | 27 int low = 0; in escape() local
34 sb.append(text.substring(low, i)); in escape()
36 low = i + 1; in escape()
43 sb.append(text.substring(low)); in escape()
|
| /art/compiler/utils/x86/ |
| D | managed_register_x86.cc | 42 Register low; member
48 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, argument
68 Register low = AsRegisterPairLow(); in Overlaps() local
70 return X86ManagedRegister::FromCpuRegister(low).Overlaps(other) || in Overlaps()
85 return kRegisterPairs[r].low; in AllocIdLow()
|
| /art/compiler/utils/x86_64/ |
| D | managed_register_x86_64.cc | 41 Register low; member
47 #define REGISTER_PAIR_ENUMERATION(low, high) { low##_##high, low, high }, argument
63 Register low = AsRegisterPairLow().AsRegister(); in Overlaps() local
65 return X86_64ManagedRegister::FromCpuRegister(low).Overlaps(other) || in Overlaps()
80 return kRegisterPairs[r].low; in AllocIdLow()
|
| /art/compiler/utils/arm64/ |
| D | managed_register_arm64.cc | 67 int low = RegNo(); in RegIdLow() local
69 low += kNumberOfXRegIds; in RegIdLow()
71 low += kNumberOfXRegIds + kNumberOfWRegIds + kNumberOfDRegIds; in RegIdLow()
73 return low; in RegIdLow()
|
| /art/compiler/optimizing/ |
| D | intrinsics.cc | 121 int32_t low = GetIntegerCacheField(cache_class, kLowFieldName); in CheckIntegerCache() local
123 if (boot_image_cache->GetLength() != high - low + 1) { in CheckIntegerCache()
140 if (value_field->GetInt(boot_image_object) != low + i) { in CheckIntegerCache()
183 int32_t low = GetIntegerCacheField(cache_class, kLowFieldName); in ComputeIntegerValueOfLocations() local
188 CHECK_EQ(current_cache->GetLength(), high - low + 1); in ComputeIntegerValueOfLocations()
194 CHECK_EQ(value_field->GetInt(current_object), low + i); in ComputeIntegerValueOfLocations()
199 if (static_cast<uint32_t>(value) - static_cast<uint32_t>(low) < in ComputeIntegerValueOfLocations()
200 static_cast<uint32_t>(high - low + 1)) { in ComputeIntegerValueOfLocations()
234 int32_t low = value_field->GetInt(low_integer); in ComputeIntegerValueOfLocations() local
235 if (static_cast<uint32_t>(value) - static_cast<uint32_t>(low) < in ComputeIntegerValueOfLocations()
[all …]
|
| D | locations.h | 137 static Location RegisterPairLocation(int low, int high) { in RegisterPairLocation() argument
138 return Location(kRegisterPair, low << 16 | high); in RegisterPairLocation()
141 static Location FpuRegisterPairLocation(int low, int high) { in FpuRegisterPairLocation() argument
142 return Location(kFpuRegisterPair, low << 16 | high); in FpuRegisterPairLocation()
170 int low() const { in low() function
195 return static_cast<T>(low()); in AsRegisterPairLow()
207 return static_cast<T>(low()); in AsFpuRegisterPairLow()
222 return Location::RegisterLocation(low()); in ToLow()
224 return Location::FpuRegisterLocation(low()); in ToLow()
|
| D | common_arm.h | 77 int reg_code = location.low(); in DRegisterFrom()
211 inline Location LocationFrom(const vixl::aarch32::Register& low, in LocationFrom() argument
213 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
216 inline Location LocationFrom(const vixl::aarch32::SRegister& low, in LocationFrom() argument
218 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode()); in LocationFrom()
|
| D | register_allocator.cc | 223 LiveInterval* low = interval->GetLowInterval()->SplitAt(position); in Split() local
224 new_interval->SetLowInterval(low); in Split()
225 low->SetHighInterval(new_interval); in Split()
|
| D | locations.cc | 103 os << location.low() << ":" << location.high(); in operator <<()
|
| D | code_generator.cc | 1411 int low = location.low(); in EmitVRegInfo() local
1413 if (slow_path != nullptr && slow_path->IsFpuRegisterSaved(low)) { in EmitVRegInfo()
1414 uint32_t offset = slow_path->GetStackOffsetOfFpuRegister(low); in EmitVRegInfo()
1417 stack_map_stream->AddDexRegisterEntry(Kind::kInFpuRegister, low); in EmitVRegInfo()
1432 int low = location.low(); in EmitVRegInfo() local
1434 if (slow_path != nullptr && slow_path->IsCoreRegisterSaved(low)) { in EmitVRegInfo()
1435 uint32_t offset = slow_path->GetStackOffsetOfCoreRegister(low); in EmitVRegInfo()
1438 stack_map_stream->AddDexRegisterEntry(Kind::kInRegister, low); in EmitVRegInfo()
|
| D | parallel_move_resolver.cc | 82 return Location::RegisterLocation(location.low()); in LowOf()
84 return Location::FpuRegisterLocation(location.low()); in LowOf()
|
| D | register_allocator_linear_scan.cc | 39 static bool IsLowOfUnalignedPairInterval(LiveInterval* low) { in IsLowOfUnalignedPairInterval() argument
40 return GetHighForLowRegister(low->GetRegister()) != low->GetHighInterval()->GetRegister(); in IsLowOfUnalignedPairInterval()
352 current->SetRegister(first.low()); in ProcessInstruction()
364 current->SetRegister(output.low()); in ProcessInstruction()
|
| D | intrinsics.h | 116 int32_t low; member
|
| D | induction_var_analysis.cc | 300 uint32_t low = d1; in VisitNode() local
302 low = std::min(low, VisitDescendant(loop, input)); in VisitNode()
306 if (low < d1) { in VisitNode()
307 map_.find(instruction)->second.depth = low; in VisitNode()
|
| /art/test/717-integer-value-of/src/ |
| D | Main.java | 95 int low = (int) lowField.get(integerCacheClass); in testValueOfConst() local
96 Integer old42 = cache[42 - low]; in testValueOfConst()
97 cache[42 - low] = new Integer(42); in testValueOfConst()
105 cache[42 - low] = old42; in testValueOfConst()
|
| /art/test/568-checker-onebit/ |
| D | info.txt | 1 Unit test for 32-bit and 64-bit high/low-bit operations.
|
| /art/test/550-checker-regression-wide-store/ |
| D | info.txt | 2 would not invalidate the low vreg. The resulting environment would generate
|
| /art/runtime/native/ |
| D | libcore_util_CharsetUtils.cc | 224 jchar low = (i + 1 != end) ? string->CharAt(i + 1) : 0; in CharsetUtils_toUtf8Bytes() local
225 if (!U16_IS_SURROGATE_LEAD(high) || !U16_IS_SURROGATE_TRAIL(low)) { in CharsetUtils_toUtf8Bytes()
233 ch = U16_GET_SUPPLEMENTARY(high, low); in CharsetUtils_toUtf8Bytes()
|
| D | java_lang_Class.cc | 371 size_t low = 0; in FindFieldByName() local
378 while (low < high) { in FindFieldByName()
379 auto mid = (low + high) / 2; in FindFieldByName()
395 low = mid + 1; in FindFieldByName()
|
| /art/runtime/interpreter/mterp/arm/ |
| D | other.S | 29 FETCH r0, 1 @ r0<- bbbb (low)
80 FETCH r0, 1 @ r0<- bbbb (low)
96 FETCH r0, 1 @ r0<- bbbb (low)
97 FETCH r1, 2 @ r1<- BBBB (low middle)
99 orr r0, r0, r1, lsl #16 @ r0<- BBBBbbbb (low word)
124 FETCH r0, 1 @ r0<- 0000bbbb (low)
|
| /art/tools/ahat/src/main/com/android/ahat/dominators/ |
| D | Dominators.java | 208 public boolean hasIdInRange(long low, long high) { in hasIdInRange() argument
210 if (low <= ids[i] && ids[i] <= high) { in hasIdInRange()
|
| /art/test/530-checker-lse/src/ |
| D | Main.java | 595 static int sumWithinRange(int[] array, final int low, final int high) { in sumWithinRange() argument
598 return (i >= low) && (i <= high); in sumWithinRange()
|
| /art/runtime/interpreter/mterp/x86/ |
| D | other.S | 243 movl (%eax), %eax # Get low
|
| /art/tools/ahat/ |
| D | README.txt | 37 * [low priority] by site allocations won't line up if the stack has been
|