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Searched refs:BITS_WITH_WMASK (Results 1 – 10 of 10) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dm0_ctl.c26 BITS_WITH_WMASK((M0_BINCODE_BASE >> 12) & 0xffff, in m0_init()
29 BITS_WITH_WMASK((M0_BINCODE_BASE >> 28) & 0xf, in m0_init()
44 BIT_WITH_WMSK(15) | BITS_WITH_WMASK(0x0, 0x1f, 8)); in m0_init()
53 BITS_WITH_WMASK(0x0, 0xf, 0)); in m0_start()
60 BITS_WITH_WMASK(0x0, 0x4, 0)); in m0_start()
65 BITS_WITH_WMASK(0x0, 0x20, 0)); in m0_start()
73 BITS_WITH_WMASK(0x24, 0x24, 0)); in m0_stop()
77 BITS_WITH_WMASK(0xf, 0xf, 0)); in m0_stop()
Dpmu.h50 #define GPIO0A0_SMT_ENABLE BITS_WITH_WMASK(1, 3, 0)
51 #define GPIO1A6_IOMUX BITS_WITH_WMASK(0, 3, 12)
Dpmu.c919 BITS_WITH_WMASK(0, 0x07, PCLK_GPIO2_GATE_SHIFT)); in suspend_apio()
1039 BITS_WITH_WMASK(gpio_2_4_clk_gate, 0x07, in resume_apio()
1421 BITS_WITH_WMASK(clk_ddrc_save, 0xff, 0)); in rockchip_soc_sys_pwr_dm_resume()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pwm/
Dpwm.c38 val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK, in disable_pwms()
47 val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK, in disable_pwms()
56 val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK, in disable_pwms()
65 val = BITS_WITH_WMASK(GRF_IOMUX_GPIO, GRF_IOMUX_2BIT_MASK, in disable_pwms()
97 val = BITS_WITH_WMASK(PMUGRF_GPIO0A6_IOMUX_PWM, in enable_pwms()
104 val = BITS_WITH_WMASK(PMUGRF_GPIO1C3_IOMUX_PWM, in enable_pwms()
111 val = BITS_WITH_WMASK(GRF_GPIO4C6_IOMUX_PWM, in enable_pwms()
118 val = BITS_WITH_WMASK(GRF_GPIO4C2_IOMUX_PWM, in enable_pwms()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/
Dpmu.c284 BITS_WITH_WMASK(1, 1, 15)); in pll_pwr_dwn()
287 BITS_WITH_WMASK(1, 1, 14)); in pll_pwr_dwn()
290 BITS_WITH_WMASK(0, 1, 14)); in pll_pwr_dwn()
305 BITS_WITH_WMASK(1, 1, 15)); in dpll_suspend()
307 BITS_WITH_WMASK(1, 1, 14)); in dpll_suspend()
315 BITS_WITH_WMASK(1, 1, 15)); in dpll_resume()
317 BITS_WITH_WMASK(0, 1, 14)); in dpll_resume()
381 BITS_WITH_WMASK(0, 0x1f, 0)); in pm_plls_suspend()
385 BITS_WITH_WMASK(0, 0xf, 0)); in pm_plls_suspend()
389 BITS_WITH_WMASK(0, 0x1f, 0)); in pm_plls_suspend()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/
Dsoc.h53 #define PLL_BYPASS BITS_WITH_WMASK(1, 0x1, 15)
54 #define PLL_NO_BYPASS BITS_WITH_WMASK(0, 0x1, 15)
57 BITS_WITH_WMASK(0, 0x1, 1) : \
58 BITS_WITH_WMASK(0, 0x1, ((id) * 4))
60 BITS_WITH_WMASK(1, 0x1, 1) : \
61 BITS_WITH_WMASK(1, 0x1, ((id) * 4))
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/
Drk3399_gpio.c77 BITS_WITH_WMASK(0, CLK_GATE_MASK, in gpio_get_clock()
85 BITS_WITH_WMASK(0, CLK_GATE_MASK, in gpio_get_clock()
93 BITS_WITH_WMASK(0, CLK_GATE_MASK, in gpio_get_clock()
101 BITS_WITH_WMASK(0, CLK_GATE_MASK, in gpio_get_clock()
109 BITS_WITH_WMASK(0, CLK_GATE_MASK, in gpio_get_clock()
127 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, in gpio_put_clock()
132 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, in gpio_put_clock()
137 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, in gpio_put_clock()
142 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, in gpio_put_clock()
148 BITS_WITH_WMASK(clock_state, CLK_GATE_MASK, in gpio_put_clock()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/secure/
Dsecure.c70 BITS_WITH_WMASK(st_mb, SGRF_DDR_RGN_0_16_WMSK, 0)); in sgrf_ddr_rgn_config()
74 BITS_WITH_WMASK((ed_mb - 1), SGRF_DDR_RGN_0_16_WMSK, 0)); in sgrf_ddr_rgn_config()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/include/
Dplat_private.h53 #ifndef BITS_WITH_WMASK
54 #define BITS_WITH_WMASK(bits, msk, shift)\ macro
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/soc/
Dsoc.h35 #define PLL_SLOW_MODE BITS_WITH_WMASK(SLOW_MODE,\
38 #define PLL_NOMAL_MODE BITS_WITH_WMASK(NORMAL_MODE,\