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Searched refs:BIT_3 (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_mskreg.h194 #define BIT_3 (1 << 3) macro
295 #define PCI_CLS_OPT BIT_3 /* Cache Line Size opt. PCI-X (YUKON-2) */
312 #define PCI_EN_DUMMY_RD BIT_3 /* Enable Dummy Read */
340 #define PCI_ASPM_CLKREQ_PAD_CTL BIT_3 /* CLKREQ PAD Control (A1 only) */
373 #define PCI_GAT_PCIE_ENTER_L1_ST BIT_3 /* PCIe Enter L1 State */
403 #define PEX_DC_EN_UNS_RQ_RP BIT_3 /* Enable Unsupported Request Reporting */
801 #define CS_MRST_CLR BIT_3 /* Clear Master Reset */
815 #define PC_VAUX_ON BIT_3 /* Switch VAUX On */
845 #define Y2_IS_IRQ_MAC1 BIT_3 /* Interrupt from MAC 1 */
876 #define Y2_IS_PAR_MAC1 BIT_3 /* MAC hardware fault interrupt */
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/device/linaro/bootloader/edk2/OptionRomPkg/UndiRuntimeDxe/
DE100b.h204 #define BIT_3 0x0008 macro
299 #define MDI_SR_AUTO_SELECT_CAPABLE BIT_3 // Auto speed select capable
331 #define NWAY_EX_LP_NEXT_PAGE_ABLE BIT_3 // partner is next page able
513 #define CFIG_NSAI BIT_3
553 #define CFIG_MC_ALL BIT_3