Searched refs:BIT_5 (Results 1 – 2 of 2) sorted by relevance
192 #define BIT_5 (1 << 5) macro310 #define PCI_EXT_PATCH_1 BIT_5371 #define PCI_GAT_PCIE_RESET_ASS BIT_5 /* PCIe Reset Asserted */799 #define CS_STOP_DONE BIT_5 /* Stop Master is finished */813 #define PC_VCC_ENA BIT_5 /* Switch VCC Enable */843 #define Y2_IS_PHY_QLNK BIT_5 /* PHY Quick Link (Yukon Optima) */874 #define Y2_IS_PAR_RD1 BIT_5 /* Read RAM parity error interrupt */928 #define Y2_COR_CLK_LNK2_DIS BIT_5 /* Disable Core clock Link 2 */982 #define TST_FRC_DPERR_TR BIT_5 /* force DATAPERR on TRG RD */1067 #define TXA_ENA_ALLOC BIT_5 /* Enable alloc of free bandwidth */[all …]
206 #define BIT_5 0x0020 macro301 #define MDI_SR_AUTO_NEG_COMPLETE BIT_5 // Auto negotiation complete311 #define NWAY_AD_10T_HALF_DPX BIT_5 // 10BaseT Half Duplex capable361 #define NSC_TX_CONG_F_CONNECT BIT_5 // Enables congestion control514 #define CFIG_PREAMBLE_LENGTH BIT_5 ;- Bit 5-4 = 1-0