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Searched refs:CIC_BASE (Results 1 – 4 of 4) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/
Ddram.c64 mmio_write_32(CIC_BASE + CIC_CTRL0, in handle_dram()
68 while ((mmio_read_32(CIC_BASE + CIC_STATUS0) & (1 << 2)) == 0) in handle_dram()
72 mmio_write_32(CIC_BASE + CIC_CTRL0, 0x20002); in handle_dram()
73 while ((mmio_read_32(CIC_BASE + CIC_STATUS0) & (1 << 0)) == 0) in handle_dram()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
Dsuspend.c547 mmio_write_32(CIC_BASE + CIC_CTRL0, in dram_switch_to_next_index()
550 while (!(mmio_read_32(CIC_BASE + CIC_STATUS0) & (1 << 2))) in dram_switch_to_next_index()
553 mmio_write_32(CIC_BASE + CIC_CTRL0, 0x20002); in dram_switch_to_next_index()
554 while (!(mmio_read_32(CIC_BASE + CIC_STATUS0) & (1 << 0))) in dram_switch_to_next_index()
Ddfs.c1748 mmio_write_32(CIC_BASE + CIC_CTRL1, in exit_low_power()
1794 mmio_write_32(CIC_BASE + CIC_CTRL1, in resume_low_power()
1814 mmio_write_32(CIC_BASE + CIC_CG_WAIT_TH, 0x640008); in dram_low_power_config()
1821 mmio_write_32(CIC_BASE + CIC_CTRL1, 0x002a0028); in dram_low_power_config()
1827 mmio_write_32(CIC_BASE + CIC_CTRL1, 0x00150014); in dram_low_power_config()
1957 mmio_write_32(CIC_BASE + CIC_IDLE_TH, (arg0 >> 16) & 0xffff); in dram_set_odt_pd()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
Daddressmap_shared.h32 #define CIC_BASE (MMIO_BASE + 0x07620000) macro