Searched refs:CSR_WRITE_2 (Results 1 – 2 of 2) sorted by relevance
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/ |
| D | if_msk.c | 544 …CSR_WRITE_2 (sc_if->msk_softc, Y2_PREF_Q_ADDR (sc_if->msk_rxq, PREF_UNIT_PUT_IDX_REG), sc_if->msk_… in msk_init_rx_ring()
775 CSR_WRITE_2 (sc, B0_CTST, Y2_HW_WOL_OFF); in msk_phy_power()
800 CSR_WRITE_2 (sc, MR_ADDR (i, GMAC_LINK_CTRL), GMLC_RST_SET); in msk_phy_power()
801 CSR_WRITE_2 (sc, MR_ADDR (i, GMAC_LINK_CTRL), GMLC_RST_CLR); in msk_phy_power()
870 CSR_WRITE_2 (sc, B0_CTST, CS_MRST_CLR); in clear_pci_errors()
888 CSR_WRITE_2 (sc, B0_CTST, CS_RST_CLR); in mskc_reset()
897 CSR_WRITE_2 (sc, B28_Y2_ASF_HCU_CCSR, status); in mskc_reset()
901 CSR_WRITE_2 (sc, B0_CTST, Y2_ASF_DISABLE); in mskc_reset()
906 CSR_WRITE_2 (sc, B0_CTST, CS_RST_SET); in mskc_reset()
907 CSR_WRITE_2 (sc, B0_CTST, CS_RST_CLR); in mskc_reset()
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| D | if_mskreg.h | 2067 #define CSR_WRITE_2(sc, reg, val) MmioWrite16 ((sc)->RegBase + (reg), (val)) macro
2083 #define GMAC_WRITE_2(sc, port, reg, val) CSR_WRITE_2 ((sc), GMAC_REG((port), (reg)), (val))
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