Searched refs:ENABLE_GRP1 (Results 1 – 3 of 3) sorted by relevance
39 val &= ~(ENABLE_GRP0 | ENABLE_GRP1); in tegra_gic_cpuif_deactivate()53 val = ENABLE_GRP0 | ENABLE_GRP1 | FIQ_EN | FIQ_BYP_DIS_GRP0; in tegra_gic_cpuif_setup()155 gicd_write_ctlr(gicd_base, ENABLE_GRP0 | ENABLE_GRP1); in tegra_gic_distif_setup()
151 val &= ~(ENABLE_GRP0 | ENABLE_GRP1); in arm_gic_cpuif_deactivate()232 ctlr &= ~(ENABLE_GRP0 | ENABLE_GRP1); in arm_gic_distif_setup()
31 #define ENABLE_GRP1 (U(1) << 1) macro