1 /*
2  * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef __CCI_400_H__
8 #define __CCI_400_H__
9 
10 /**************************************************************
11  * THIS DRIVER IS DEPRECATED. Please use the driver in cci.h
12  **************************************************************/
13 #if ERROR_DEPRECATED
14 #error " The CCI-400 specific driver is deprecated."
15 #endif
16 
17 
18 /* Slave interface offsets from PERIPHBASE */
19 #define SLAVE_IFACE4_OFFSET		0x5000
20 #define SLAVE_IFACE3_OFFSET		0x4000
21 #define SLAVE_IFACE2_OFFSET		0x3000
22 #define SLAVE_IFACE1_OFFSET		0x2000
23 #define SLAVE_IFACE0_OFFSET		0x1000
24 #define SLAVE_IFACE_OFFSET(index)	SLAVE_IFACE0_OFFSET +	\
25 					(0x1000 * (index))
26 
27 /* Control and ID register offsets */
28 #define CTRL_OVERRIDE_REG		0x0
29 #define SPEC_CTRL_REG			0x4
30 #define SECURE_ACCESS_REG		0x8
31 #define STATUS_REG			0xc
32 #define IMPRECISE_ERR_REG		0x10
33 #define PERFMON_CTRL_REG		0x100
34 
35 /* Slave interface register offsets */
36 #define SNOOP_CTRL_REG			0x0
37 #define SH_OVERRIDE_REG			0x4
38 #define READ_CHNL_QOS_VAL_OVERRIDE_REG	0x100
39 #define WRITE_CHNL_QOS_VAL_OVERRIDE_REG	0x104
40 #define QOS_CTRL_REG			0x10c
41 #define MAX_OT_REG			0x110
42 #define TARGET_LATENCY_REG		0x130
43 #define LATENCY_REGULATION_REG		0x134
44 #define QOS_RANGE_REG			0x138
45 
46 /* Snoop Control register bit definitions */
47 #define DVM_EN_BIT			(1 << 1)
48 #define SNOOP_EN_BIT			(1 << 0)
49 
50 /* Status register bit definitions */
51 #define CHANGE_PENDING_BIT		(1 << 0)
52 
53 #ifndef __ASSEMBLY__
54 
55 #include <stdint.h>
56 
57 /* Function declarations */
58 
59 /*
60  * The CCI-400 driver must be initialized with the base address of the
61  * CCI-400 device in the platform memory map, and the cluster indices for
62  * the CCI-400 slave interfaces 3 and 4 respectively. These are the fully
63  * coherent ACE slave interfaces of CCI-400.
64  * The cluster indices must either be 0 or 1, corresponding to the level 1
65  * affinity instance of the mpidr representing the cluster. A negative cluster
66  * index indicates that no cluster is present on that slave interface.
67  */
68 void cci_init(uintptr_t cci_base,
69 		int slave_iface3_cluster_ix,
70 		int slave_iface4_cluster_ix) __deprecated;
71 
72 void cci_enable_cluster_coherency(unsigned long mpidr) __deprecated;
73 void cci_disable_cluster_coherency(unsigned long mpidr) __deprecated;
74 
75 #endif /* __ASSEMBLY__ */
76 #endif /* __CCI_400_H__ */
77