Searched refs:PLL_SLOW_MODE (Results 1 – 8 of 8) sorted by relevance
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/ |
D | misc_regs.h | 19 #define PLL_SLOW_MODE 0 macro
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/ |
D | pmu.c | 192 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(CPLL_ID)); in rockchip_soc_soft_reset() 193 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(GPLL_ID)); in rockchip_soc_soft_reset() 194 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(NPLL_ID)); in rockchip_soc_soft_reset() 195 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(APLL_ID)); in rockchip_soc_soft_reset() 298 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(DPLL_ID)); in dpll_suspend() 342 mmio_write_32(CRU_BASE + CRU_CRU_MODE, PLL_SLOW_MODE(pll_id)); in pll_suspend()
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/soc/ |
D | soc.c | 49 mmio_write_32(PMUCRU_BASE + PMUCRU_PPLL_CON(3), PLL_SLOW_MODE); in set_pll_slow_mode() 52 CRU_PLL_CON(pll_id, 3)), PLL_SLOW_MODE); in set_pll_slow_mode() 119 mmio_write_32((CRU_BASE + CRU_PLL_CON(pll_id, 3)), PLL_SLOW_MODE); in restore_pll()
|
D | soc.h | 35 #define PLL_SLOW_MODE BITS_WITH_WMASK(SLOW_MODE,\ macro
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/ |
D | dram.c | 43 mmio_write_32(CRU_BASE + CRU_DPLL_CON3, PLL_MODE(PLL_SLOW_MODE)); in ddr_set_pll()
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/ |
D | soc.h | 56 #define PLL_SLOW_MODE(id) ((id) == NPLL_ID) ? \ macro
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/ |
D | suspend.c | 644 mmio_write_32((CRU_BASE + CRU_PLL_CON(pll_id, 3)), PLL_SLOW_MODE); in pmusram_restore_pll()
|
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/ |
D | pmu.c | 557 PLL_SLOW_MODE); in clst_pwr_domain_suspend()
|