Searched refs:Sx (Results 1 – 9 of 9) sorted by relevance
52 Context->Sx.Phase = SxEntry; in SxGetContext()60 Context->Sx.Type = SxS0; in SxGetContext()64 Context->Sx.Type = SxS3; in SxGetContext()68 Context->Sx.Type = SxS4; in SxGetContext()72 Context->Sx.Type = SxS5; in SxGetContext()87 return (BOOLEAN)(Context1->Sx.Type == Context2->Sx.Type); in SxCmpContext()
376 if ((Record->ChildContext.Sx.Type < SxS0) || in QNCSmmCoreRegister()377 (Record->ChildContext.Sx.Type >= EfiMaximumSleepType) || in QNCSmmCoreRegister()378 (Record->ChildContext.Sx.Phase < SxEntry) || in QNCSmmCoreRegister()379 (Record->ChildContext.Sx.Phase >= EfiMaximumPhase) in QNCSmmCoreRegister()
219 EFI_SMM_SX_REGISTER_CONTEXT Sx; member506 EFI_SMM_SX_DISPATCH2_PROTOCOL Sx; member
52 struct StmDmaStreamRegs Sx[STM_DMA_NUM_STREAMS]; member170 return &gDmaDevs[busId].regs->Sx[stream]; in dmaGetStreamRegs()
86 // Detect Sx state for MOR, only S4, S5 need to handle
95 // Detect Sx state for MOR, only S4, S5 need to handle
88 // Detect Sx state for MOR, only S4, S5 need to handle
130 // the Sx state.
1 …Z3/GaXugm+HpVy10ZYLyFSrjelNLB6UsDmiGmM0crk4ZEp9fn3LK0okvFUf76CuRRXFYheypXM+Sx/lGIx2TB7ME5kVoCBXiB0…