Searched refs:TCR (Results 1 – 6 of 6) sorted by relevance
562 UINT64 TCR; in ArmConfigureMmu() local583 TCR = T0SZ | (1UL << 31) | (1UL << 23) | TCR_TG0_4KB; in ArmConfigureMmu()587 TCR |= TCR_PS_4GB; in ArmConfigureMmu()589 TCR |= TCR_PS_64GB; in ArmConfigureMmu()591 TCR |= TCR_PS_1TB; in ArmConfigureMmu()593 TCR |= TCR_PS_4TB; in ArmConfigureMmu()595 TCR |= TCR_PS_16TB; in ArmConfigureMmu()597 TCR |= TCR_PS_256TB; in ArmConfigureMmu()605 TCR = T0SZ | TCR_TG0_4KB | TCR_TG1_4KB | TCR_EPD1; in ArmConfigureMmu()609 TCR |= TCR_IPS_4GB; in ArmConfigureMmu()[all …]
673 …__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register … member1594 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
653 …__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register … member1574 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
713 …__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register … member1746 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
894 …__IO uint32_t TCR; /*!< Offset: 0xE80 (R/W) ITM Trace Control Register … member2165 if ((ITM->TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ in ITM_SendChar()
678 make_smmu_cb_cfg(TCR, n), \