Searched refs:TT_ATTR_INDX_MEMORY_NON_CACHEABLE (Results 1 – 3 of 3) sorted by relevance
48 return TT_ATTR_INDX_MEMORY_NON_CACHEABLE; in ArmMemoryAttributeToPageAttribute()72 case TT_ATTR_INDX_MEMORY_NON_CACHEABLE: in PageAttributeToGcdAttribute()709 …MAIR_ATTR(TT_ATTR_INDX_MEMORY_NON_CACHEABLE, MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE) | // mapped to… in ArmConfigureMmu()
64 #define TT_ATTR_INDX_MEMORY_NON_CACHEABLE (0x1 << 2) macro
209 ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE; in EfiAttributeToArmAttribute()