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Searched refs:UINT32 (Results 1 – 25 of 3339) sorted by relevance

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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Include/Regs/
DHisiPcieV1RegOffset.h202 UINT32 reserved : 31 ;
203 UINT32 pipe_loopback_enable : 1 ;
205 UINT32 UInt32;
213 UINT32 vendor_id : 16 ;
214 UINT32 device_id : 16 ;
218 UINT32 UInt32;
229 UINT32 io_space_enable : 1 ;
230 UINT32 memory_space_enable : 1 ;
231 UINT32 bus_master_enable : 1 ;
232 UINT32 specialcycleenable : 1 ;
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/device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/
DCpuid.h97 UINT32 SteppingId:4; ///< [Bits 3:0] Stepping ID
98 UINT32 Model:4; ///< [Bits 7:4] Model
99 UINT32 FamilyId:4; ///< [Bits 11:8] Family
100 UINT32 ProcessorType:2; ///< [Bits 13:12] Processor Type
101 UINT32 Reserved1:2; ///< [Bits 15:14] Reserved
102 UINT32 ExtendedModelId:4; ///< [Bits 19:16] Extended Model ID
103 UINT32 ExtendedFamilyId:8; ///< [Bits 27:20] Extended Family ID
104 UINT32 Reserved2:4; ///< Reserved
109 UINT32 Uint32;
135 UINT32 BrandIndex:8;
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DArchitecturalMsr.h142 UINT32 Reserved1:32;
143 UINT32 Reserved2:18;
158 UINT32 PlatformId:3;
159 UINT32 Reserved3:11;
196 UINT32 Reserved1:8;
200 UINT32 BSP:1;
201 UINT32 Reserved2:1;
206 UINT32 EXTD:1;
210 UINT32 EN:1;
214 UINT32 ApicBase:20;
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DLocalApic.h56 UINT32 Version:8; ///< The version numbers of the local APIC.
57 UINT32 Reserved0:8; ///< Reserved.
58 UINT32 MaxLvtEntry:8; ///< Number of LVT entries minus 1.
59 UINT32 EoiBroadcastSuppression:1; ///< 1 if EOI-broadcast suppression supported.
60 UINT32 Reserved1:7; ///< Reserved.
62 UINT32 Uint32;
70 UINT32 Vector:8; ///< The vector number of the interrupt being sent.
71 UINT32 DeliveryMode:3; ///< Specifies the type of IPI to be sent.
72 UINT32 DestinationMode:1; ///< 0: physical destination mode, 1: logical destination mode.
73UINT32 DeliveryStatus:1; ///< Indicates the IPI delivery status. This field is reserved in…
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/device/linaro/bootloader/edk2/UefiCpuPkg/Include/Register/Msr/
DHaswellMsr.h57 UINT32 Reserved1:8;
63 UINT32 MaximumNonTurboRatio:8;
64 UINT32 Reserved2:12;
71 UINT32 RatioLimit:1;
78 UINT32 TDPLimit:1;
79 UINT32 Reserved3:2;
85 UINT32 LowPowerModeSupport:1;
91 UINT32 ConfigTDPLevels:2;
92 UINT32 Reserved4:5;
98 UINT32 MaximumEfficiencyRatio:8;
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DSkylakeMsr.h61 UINT32 Maximum1C:8;
66 UINT32 Maximum2C:8;
71 UINT32 Maximum3C:8;
76 UINT32 Maximum4C:8;
77 UINT32 Reserved:32;
82 UINT32 Uint32;
180 UINT32 Ovf_PMC0:1;
184 UINT32 Ovf_PMC1:1;
188 UINT32 Ovf_PMC2:1;
192 UINT32 Ovf_PMC3:1;
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DGoldmontMsr.h60 UINT32 Lock:1;
64 UINT32 EnableVmxInsideSmx:1;
68 UINT32 EnableVmxOutsideSmx:1;
69 UINT32 Reserved1:5;
73 UINT32 SenterLocalFunctionEnables:7;
77 UINT32 SenterGlobalEnable:1;
78 UINT32 Reserved2:2;
82 UINT32 SgxEnable:1;
83 UINT32 Reserved3:13;
84 UINT32 Reserved4:32;
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DXeonDMsr.h60 UINT32 LockOut:1;
64 UINT32 Enable_PPIN:1;
65 UINT32 Reserved1:30;
66 UINT32 Reserved2:32;
71 UINT32 Uint32;
126 UINT32 Reserved1:8;
130 UINT32 MaximumNonTurboRatio:8;
131 UINT32 Reserved2:7;
135 UINT32 PPIN_CAP:1;
136 UINT32 Reserved3:4;
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DCore2Msr.h56 UINT32 Reserved1:8;
60 UINT32 MaximumQualifiedRatio:5;
61 UINT32 Reserved2:19;
62 UINT32 Reserved3:18;
66 UINT32 PlatformId:3;
67 UINT32 Reserved4:11;
105 UINT32 Reserved1:1;
110 UINT32 DataErrorCheckingEnable:1;
115 UINT32 ResponseErrorCheckingEnable:1;
120 UINT32 MCERR_DriveEnable:1;
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DSilvermontMsr.h56 UINT32 Reserved1:8;
60 UINT32 MaximumQualifiedRatio:5;
61 UINT32 Reserved2:19;
62 UINT32 Reserved3:18;
66 UINT32 PlatformId:3;
67 UINT32 Reserved4:11;
104 UINT32 Reserved1:32;
105 UINT32 Reserved2:32;
110 UINT32 Uint32;
149 UINT32 SMICount:32;
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DP6Msr.h114 UINT32 Reserved1:32;
115 UINT32 Reserved2:18;
130 UINT32 PlatformId:3;
134 UINT32 L2CacheLatencyRead:4;
135 UINT32 Reserved3:3;
139 UINT32 ClockFrequencyRatioRead:1;
140 UINT32 Reserved4:3;
177 UINT32 Reserved1:8;
181 UINT32 BSP:1;
182 UINT32 Reserved2:2;
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DSandyBridgeMsr.h59 UINT32 SMICount:32;
60 UINT32 Reserved:32;
65 UINT32 Uint32;
101 UINT32 Reserved1:8;
107 UINT32 MaximumNonTurboRatio:8;
108 UINT32 Reserved2:12;
115 UINT32 RatioLimit:1;
122 UINT32 TDPLimit:1;
123 UINT32 Reserved3:2;
124 UINT32 Reserved4:8;
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DXeonPhiMsr.h59 UINT32 SMICount:32;
60 UINT32 Reserved:32;
65 UINT32 Uint32;
101 UINT32 Reserved1:8;
107 UINT32 MaximumNonTurboRatio:8;
108 UINT32 Reserved2:12;
115 UINT32 RatioLimit:1;
122 UINT32 TDPLimit:1;
123 UINT32 Reserved3:2;
124 UINT32 Reserved4:8;
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DAtomMsr.h56 UINT32 Reserved1:8;
60 UINT32 MaximumQualifiedRatio:5;
61 UINT32 Reserved2:19;
62 UINT32 Reserved3:32;
67 UINT32 Uint32;
104 UINT32 Reserved1:1;
109 UINT32 DataErrorCheckingEnable:1;
114 UINT32 ResponseErrorCheckingEnable:1;
118 UINT32 AERR_DriveEnable:1;
123 UINT32 BERR_Enable:1;
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DIvyBridgeMsr.h57 UINT32 Reserved1:8;
63 UINT32 MaximumNonTurboRatio:8;
64 UINT32 Reserved2:12;
71 UINT32 RatioLimit:1;
78 UINT32 TDPLimit:1;
79 UINT32 Reserved3:2;
85 UINT32 LowPowerModeSupport:1;
91 UINT32 ConfigTDPLevels:2;
92 UINT32 Reserved4:5;
98 UINT32 MaximumEfficiencyRatio:8;
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DCoreMsr.h96 UINT32 Reserved1:1;
101 UINT32 DataErrorCheckingEnable:1;
106 UINT32 ResponseErrorCheckingEnable:1;
111 UINT32 MCERR_DriveEnable:1;
116 UINT32 AddressParityEnable:1;
117 UINT32 Reserved2:2;
122 UINT32 BINIT_DriverEnable:1;
126 UINT32 OutputTriStateEnable:1;
130 UINT32 ExecuteBIST:1;
134 UINT32 MCERR_ObservationEnabled:1;
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciPei/
DXhciSched.h87 UINT32 RouteString:20;
91 UINT32 RootPortNum:8;
95 UINT32 TierNum:4;
102 UINT32 Dword;
128 UINT32 Parameter1;
130 UINT32 Parameter2;
132 UINT32 Status;
134 UINT32 CycleBit:1;
135 UINT32 RsvdZ1:9;
136 UINT32 Type:6;
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/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
DXhciSched.h91 UINT32 RouteString:20;
95 UINT32 RootPortNum:8;
99 UINT32 TierNum:4;
106 UINT32 Dword;
132 UINT32 Parameter1;
134 UINT32 Parameter2;
136 UINT32 Status;
138 UINT32 CycleBit:1;
139 UINT32 RsvdZ1:9;
140 UINT32 Type:6;
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/device/linaro/bootloader/edk2/MdePkg/Include/IndustryStandard/
DSd.h85 UINT32 NotUsed:1; // Not used [0:0]
86 UINT32 Crc:7; // CRC [7:1]
87 UINT32 Reserved:2; // Reserved [9:8]
88 UINT32 FileFormat:2; // File format [11:10]
89 UINT32 TmpWriteProtect:1; // Temporary write protection [12:12]
90 UINT32 PermWriteProtect:1; // Permanent write protection [13:13]
91 UINT32 Copy:1; // Copy flag (OTP) [14:14]
92 UINT32 FileFormatGrp:1; // File format group [15:15]
93 UINT32 Reserved1:5; // Reserved [20:16]
94 UINT32 WriteBlPartial:1; // Partial blocks for write allowed [21:21]
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/device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/Protocol/
DIgdOpRegion.h82 UINT32 SIZE; // 0x10 OpRegion size
83 UINT32 OVER; // 0x14 OpRegion structure version
87 UINT32 MBOX; // 0x58 Mailboxes supported
88 UINT32 DMOD; // 0x5C Driver Model
89 UINT32 PCON; // 0x60 Platform Configuration Info
100 UINT32 DRDY; // 0 Driver readiness
101 UINT32 CSTS; // 4 Status
102 UINT32 CEVT; // 8 Current event
104 UINT32 DIDL; // 32 Supported display devices list
105 UINT32 DDL2; // 8 Devices.
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Include/Library/
DSerdesLib.h59 UINT32 Hilink3Mode;
60 UINT32 Hilink4Mode;
62 UINT32 Hilink6Mode;
63 UINT32 UseSsc;
72 UINT32 MacroId;
73 UINT32 DsNum;
74 UINT32 DsCfg;
77 EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId);
80 UINT32 GetEthType(UINT8 EthChannel);
85 void SRE_SerdesEnableCTLEDFE(UINT32 macro, UINT32 lane, UINT32 ulDsCfg);
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Hi1610/Drivers/PcieInit1610/
DPcieKernelApi.h89 UINT32 preemphasis;
90 UINT32 deemphasis;
91 UINT32 swing;
92 UINT32 balance;
124 UINT32 undefined : 1 ; /* [0] undefined */
125 UINT32 reserved_1_3 : 3 ; /* reserved */
126 UINT32 data_link_proto_error : 1 ; /* Data Link Protocol Error Status */
127 UINT32 reserved_5_11 : 7 ; /* reserved */
128 UINT32 poisoned_tlp_status : 1 ; /* Poisoned TLP Status */
129 UINT32 flow_control_proto_error : 1 ; /* Flow Control Protocol Error Status */
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Pv660/Drivers/PcieInitDxe/
DPcieKernelApi.h91 UINT32 preemphasis;
92 UINT32 deemphasis;
93 UINT32 swing;
94 UINT32 balance;
126 UINT32 undefined : 1 ; /* [0] undefined */
127 UINT32 reserved_1_3 : 3 ; /* reserved */
128 UINT32 data_link_proto_error : 1 ; /* Data Link Protocol Error Status */
129 UINT32 reserved_5_11 : 7 ; /* reserved */
130 UINT32 poisoned_tlp_status : 1 ; /* Poisoned TLP Status */
131 UINT32 flow_control_proto_error : 1 ; /* Flow Control Protocol Error Status */
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/device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Include/Protocol/
DGlobalNvsArea.h90 UINT32 Port80DebugValue; // 11
135 UINT32 PpmFlags; // 45:48 PPM configuration flags, same as CFGD
164 UINT32 DeviceId1; // 71 Device ID 1
165 UINT32 DeviceId2; // 75 Device ID 2
166 UINT32 DeviceId3; // 79 Device ID 3
167 UINT32 DeviceId4; // 83 Device ID 4
168 UINT32 DeviceId5; // 87 Device ID 5
170 UINT32 AKsv0; // 91:94 First four bytes of AKSV (manufacturing mode)
220 UINT32 PPResponse; // 124 Physical Presence request operation response
235 UINT32 IgdOpRegionAddress; // 170 IGD OpRegion Starting Address
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/device/linaro/bootloader/OpenPlatformPkg/Chips/Hisilicon/Drivers/NorFlashDxe/
DNorFlashHw.h30 UINT32 ManufacturerID;
31 UINT32 DeviceID1;
32 UINT32 DeviceID2;
33 UINT32 DeviceID3;
35 UINT32 SingleChipSize;
36 UINT32 BlockSize;
37 UINT32 BufferProgramSize;
38 UINT32 CommandType;
44 UINT32 CommandType;
45 UINT32 ResetData;
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