Searched refs:Y2_CLK_DIV_DIS (Results 1 – 2 of 2) sorted by relevance
956 #define Y2_CLK_DIV_DIS BIT_0 /* Disable Core Clock Division */ macro
741 CSR_WRITE_4 (sc, B2_Y2_CLK_CTRL, Y2_CLK_DIV_DIS); in msk_phy_power()