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/device/linaro/bootloader/edk2/MdeModulePkg/Universal/RegularExpressionDxe/Oniguruma/
Dregtrav.c35 capture_tree_traverse(OnigCaptureTreeNode* node, int at, in capture_tree_traverse() argument
44 if ((at & ONIG_TRAVERSE_CALLBACK_AT_FIRST) != 0) { in capture_tree_traverse()
51 r = capture_tree_traverse(node->childs[i], at, in capture_tree_traverse()
56 if ((at & ONIG_TRAVERSE_CALLBACK_AT_LAST) != 0) { in capture_tree_traverse()
67 onig_capture_tree_traverse(OnigRegion* region, int at, in onig_capture_tree_traverse() argument
71 return capture_tree_traverse(region->history_root, at, in onig_capture_tree_traverse()
/device/google/coral/json-c/
DChangeLog101 Zachary Blair, zack_blair at hotmail dot com
104 Eric Haszlakiewicz, EHASZLA at transunion com
105 Rui Miguel Silva Seabra, rms at 1407 dot org
108 Spotted by Jean-Marc Naud, j dash m at newtraxtech dot com
110 Spotted by Vikram Raj V, vsagar at attinteractive dot com
112 Brent Miller, bdmiller at yahoo dash inc dot com
114 Brent Miller, bdmiller at yahoo dash inc dot com
120 Eric Haszlakiewicz, EHASZLA at transunion dot com
122 Ian Atha, thatha at yahoo dash inc dot com
126 Erik Hovland, erik at hovland dot org
[all …]
Dcheck.log1 HEAD is now at 6442a2f... json-c: Add libjson to the vendor image
2 HEAD is now at 6442a2f... json-c: Add libjson to the vendor image
/device/google/sunfish/json-c/
DChangeLog101 Zachary Blair, zack_blair at hotmail dot com
104 Eric Haszlakiewicz, EHASZLA at transunion com
105 Rui Miguel Silva Seabra, rms at 1407 dot org
108 Spotted by Jean-Marc Naud, j dash m at newtraxtech dot com
110 Spotted by Vikram Raj V, vsagar at attinteractive dot com
112 Brent Miller, bdmiller at yahoo dash inc dot com
114 Brent Miller, bdmiller at yahoo dash inc dot com
120 Eric Haszlakiewicz, EHASZLA at transunion dot com
122 Ian Atha, thatha at yahoo dash inc dot com
126 Erik Hovland, erik at hovland dot org
[all …]
Dcheck.log1 HEAD is now at 6442a2f... json-c: Add libjson to the vendor image
2 HEAD is now at 6442a2f... json-c: Add libjson to the vendor image
/device/google/crosshatch/json-c/
DChangeLog101 Zachary Blair, zack_blair at hotmail dot com
104 Eric Haszlakiewicz, EHASZLA at transunion com
105 Rui Miguel Silva Seabra, rms at 1407 dot org
108 Spotted by Jean-Marc Naud, j dash m at newtraxtech dot com
110 Spotted by Vikram Raj V, vsagar at attinteractive dot com
112 Brent Miller, bdmiller at yahoo dash inc dot com
114 Brent Miller, bdmiller at yahoo dash inc dot com
120 Eric Haszlakiewicz, EHASZLA at transunion dot com
122 Ian Atha, thatha at yahoo dash inc dot com
126 Erik Hovland, erik at hovland dot org
[all …]
Dcheck.log1 HEAD is now at 6442a2f... json-c: Add libjson to the vendor image
2 HEAD is now at 6442a2f... json-c: Add libjson to the vendor image
/device/google/bonito/json-c/
DChangeLog101 Zachary Blair, zack_blair at hotmail dot com
104 Eric Haszlakiewicz, EHASZLA at transunion com
105 Rui Miguel Silva Seabra, rms at 1407 dot org
108 Spotted by Jean-Marc Naud, j dash m at newtraxtech dot com
110 Spotted by Vikram Raj V, vsagar at attinteractive dot com
112 Brent Miller, bdmiller at yahoo dash inc dot com
114 Brent Miller, bdmiller at yahoo dash inc dot com
120 Eric Haszlakiewicz, EHASZLA at transunion dot com
122 Ian Atha, thatha at yahoo dash inc dot com
126 Erik Hovland, erik at hovland dot org
[all …]
/device/linaro/bootloader/edk2/UefiCpuPkg/SecCore/Ia32/
DResetVec.asm166 ; which accompanies this distribution. The full text of the license may be found at
19 ; This structure is located at 0xFFFFFFC0
40 ; This is located at 0xFFFFFFD0h
48 ; It is located at 0xFFFFFFE0, and is fixed up by some build tool
65 ; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte
86 ; Ap reset vector segment address is at 0xFFFFFFF8
95 ; BFV Base is at 0xFFFFFFFC
DResetVec.nasmb6 ; which accompanies this distribution. The full text of the license may be found at
19 ; This structure is located at 0xFFFFFFC0
39 ; This is located at 0xFFFFFFD0h
47 ; It is located at 0xFFFFFFE0, and is fixed up by some build tool
64 ; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte
85 ; Ap reset vector segment address is at 0xFFFFFFF8
94 ; BFV Base is at 0xFFFFFFFC
/device/linaro/bootloader/edk2/IntelFspWrapperPkg/FspWrapperSecCore/Ia32/
DResetVec.asm166 ; which accompanies this distribution. The full text of the license may be found at
19 ; This structure is located at 0xFFFFFFC0
40 ; This is located at 0xFFFFFFD0h
48 ; It is located at 0xFFFFFFE0, and is fixed up by some build tool
65 ; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte
86 ; Ap reset vector segment address is at 0xFFFFFFF8
95 ; BFV Base is at 0xFFFFFFFC
/device/linaro/bootloader/edk2/IntelFspWrapperPkg/FspWrapperSecCore/Vtf0/Ia16/
DResetVec.asm163 ; This structure is located at 0xFFFFFFC0
8 ; which accompanies this distribution. The full text of the license may be found at
32 ; This is located at 0xFFFFFFD0h
42 ; It is located at 0xFFFFFFE0, and is fixed up by some build tool
59 ; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte
82 ; Ap reset vector segment address is at 0xFFFFFFF8
92 ; BFV Base is at 0xFFFFFFFC
/device/linaro/bootloader/edk2/IntelFspPkg/FspSecCore/Vtf0/Ia16/
DResetVec.asm163 ; This structure is located at 0xFFFFFFC0
8 ; which accompanies this distribution. The full text of the license may be found at
32 ; This is located at 0xFFFFFFD0h
42 ; It is located at 0xFFFFFFE0, and is fixed up by some build tool
59 ; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte
82 ; Ap reset vector segment address is at 0xFFFFFFF8
92 ; BFV Base is at 0xFFFFFFFC
/device/linaro/bootloader/edk2/IntelFsp2Pkg/FspSecCore/Vtf0/Ia16/
DResetVec.asm163 ; This structure is located at 0xFFFFFFC0
8 ; which accompanies this distribution. The full text of the license may be found at
32 ; This is located at 0xFFFFFFD0h
42 ; It is located at 0xFFFFFFE0, and is fixed up by some build tool
59 ; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte
82 ; Ap reset vector segment address is at 0xFFFFFFF8
92 ; BFV Base is at 0xFFFFFFFC
/device/linaro/bootloader/edk2/EmbeddedPkg/Scripts/LauterbachT32/
DEfiLoadFv.cmm6 ; which accompanies this distribution. The full text of the license may be found at
35 ;print "found ffs file at &ffsfileaddr"
66 ;print "processing ffs file at &ffsfilestart"
76 print "ffs file at &ffsfilestart size &ffsfilesize type &ffsfiletype"
83 print "secoffset at &secoffset"
94 ;print "secoffset at &secoffset"
113 print "fv section at &secstart size &sectionsize type &sectiontype"
DEfiProcessPeImage.cmm6 ; which accompanies this distribution. The full text of the license may be found at
17 print "PE32 image found at &imgstart"
26 print "no debug dir for image at &imgstart"
33 print "debug type is not dwarf for image at &imgstart, it's &debugtype"
52 print "debug signature not found for image at &imgstart, its &dwarfsig"
DEfiProcessTeImage.cmm6 ; which accompanies this distribution. The full text of the license may be found at
17 print "TE image found at &imgstart"
26 print "no debug dir for image at &imgstart"
34 print "debug type is not dwarf for image at &imgstart, it's &debugtype"
53 print "debug signature not found for image at &imgstart, its &dwarfsig"
/device/linaro/bootloader/edk2/IntelFspPkg/FspSecCore/Ia32/
DResetVec.asm166 ; which accompanies this distribution. The full text of the license may be found at
15 ; This structure is located at 0xFFFFFFC0
36 ; This is located at 0xFFFFFFD0h
44 ; It is located at 0xFFFFFFE0, and is fixed up by some build tool
61 ; For IA32, the reset vector must be at 0xFFFFFFF0, i.e., 4G-16 byte
83 ; Ap reset vector segment address is at 0xFFFFFFF8
92 ; BFV Base is at 0xFFFFFFFC
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Demo/sockets/
Dfinger.py48 at = string.index(arg, '@')
49 host = arg[at+1:]
50 arg = arg[:at]
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/SdMmcPciHcPei/
DSdMmcPciHcPei.uni3 // of managed pci-based SD/MMC host controller at PEI phase.
10 // full text of the license may be found at
19 …pper layer to retrieve mmio base address of managed pci-based SD/MMC host controller at PEI phase."
21 …e interface of getting mmio base address of managed pci-based SD/MMC host controller at PEI phase."
/device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/UfsPciHcPei/
DUfsPciHcPei.uni3 // pci-based Ufs host controller at PEI phase.
10 // full text of the license may be found at
19 …r upper layer to retrieve mmio base address of managed pci-based Ufs host controller at PEI phase."
21 … the interface of getting mmio base address of managed pci-based Ufs host controller at PEI phase."
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/AcpiTables/Cpu0Cst/
DCpu0Cst.asl8 which accompanies this distribution. The full text of the license may be found at
198 { // IO C2 ("PMBALVL2" will be updated at runtime)
205 { // IO C4 ("PMBALVL4" will be updated at runtime)
212 { // IO C6 ("PMBALVL6" will be updated at runtime)
236 { // IO C2 ("PMBALVL2" will be updated at runtime)
243 { // IO C4 ("PMBALVL4" will be updated at runtime)
267 { // IO C2 ("PMBALVL2" will be updated at runtime)
311 { // IO C2 ("PMBALVL2" will be updated at runtime)
318 { // IO C4 ("PMBALVL4" will be updated at runtime)
325 { // IO C6 ("PMBALVL6" will be updated at runtime)
[all …]
/device/mediatek/wembley-sepolicy/non_plat/
Dboot_logo_updater.te11 # To access block files at /dev/block/mmcblk0 ir /dev/block/sdc
14 #To access file at /dev/logo
16 # To access file at /proc/lk_env
/device/mediatek/wembley-sepolicy/r_non_plat/
Dboot_logo_updater.te11 # To access block files at /dev/block/mmcblk0 ir /dev/block/sdc
14 #To access file at /dev/logo
16 # To access file at /proc/lk_env
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Acpi/AcpiTables/Fadt/
DFadt1.0.aslc10 which accompanies this distribution. The full text of the license may be found at
48 PM1_EVT_LEN, // Byte Length of ports at pm1X_evt_blk
49 PM1_CNT_LEN, // Byte Length of ports at pm1X_cnt_blk
50 PM2_CNT_LEN, // Byte Length of ports at pm2_cnt_blk
51 PM_TM_LEN, // Byte Length of ports at pm_tm_blk
52 GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk
53 GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk

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