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Searched refs:channel_width (Results 1 – 5 of 5) sorted by relevance

/device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/
Dmrc.h123 uint32_t channel_width; // x16 only member
Dprememinit.c183 mrc_params->channel_size[channel_i] *= (mrc_params->channel_width == x16) ? (1) : (2); in PreMemInit()
Dmeminit_utils.c894 uint8_t bl_divisor = (mrc_params->channel_width == x16) ? 2 : 1; // byte lane divisor in find_rising_edge()
1069 uint8_t bl_divisor = (mrc_params->channel_width == x16) ? 2 : 1; // byte lane divisor in sample_dqs()
1172 if (mrc_params->channel_width == x16) in byte_lane_mask()
1329 uint8_t bl_divisor = (mrc_params->channel_width == x16) ? 2 : 1; in print_timings()
Dmeminit.c802 …tempD = ((bl_grp_i) && (mrc_params->channel_width == x16)) ? ((0x1<<12)|(0x1<<8)|(0xF<<4)|(0xF<<0)… in ddrphy_init()
1081 uint8_t bl_divisor = (mrc_params->channel_width == x16) ? 2 : 1; // byte lane divisor in rcvn_cal()
1368 uint8_t bl_divisor = (mrc_params->channel_width == x16) ? 2 : 1; // byte lane divisor in wr_level()
1577 uint8_t bl_divisor = (mrc_params->channel_width == x16) ? 2 : 1; // byte lane divisor in rd_train()
1907 uint8_t bl_divisor = (mrc_params->channel_width == x16) ? 2 : 1; // byte lane divisor in wr_train()
/device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/
DMrcWrapper.c123 MrcData->channel_width = ItemData->ChanWidth; in MrcConfigureFromInfoHob()