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Searched refs:BIT_28 (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_mskreg.h169 #define BIT_28 (1 << 28) macro
271 #define PCI_Y2_PHY1_COMA BIT_28 /* Set PHY 1 to Coma Mode (YUKON-2) */
350 #define PCI_CTL_TIM_VMAIN_AV1 BIT_28 /* Bit 28..27: Timer Vmain_av Mask */
352 #define PCI_CTL_TIM_VMAIN_AV_MSK (BIT_28 | BIT_27)
863 #define Y2_IS_SENSOR BIT_28 /* Sensor interrupt */
1123 #define F_ALM_FULL BIT_28 /* Rx FIFO: almost full */
2023 #define GPC_SEL_BDT BIT_28 /* Select Bi-Dir. Transfer for MDC/MDIO */
2231 #define BMU_IRQ_EOB BIT_28 // Req "End of Buffer" IRQ
/device/linaro/bootloader/edk2/OptionRomPkg/UndiRuntimeDxe/
DE100b.h218 #define BIT_28 0x10000000 macro
228 #define MDI_PHY_READY BIT_28 // PHY is ready for another MDI cycle