| /device/linaro/bootloader/edk2/ArmPkg/Drivers/CpuDxe/ |
| D | Exception.c | 22 IN EFI_CPU_ARCH_PROTOCOL *Cpu in InitializeExceptions() argument
44 Cpu->GetInterruptState (Cpu, &IrqEnabled); in InitializeExceptions()
45 Cpu->DisableInterrupt (Cpu); in InitializeExceptions()
62 Status = Cpu->EnableInterrupt (Cpu); in InitializeExceptions()
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| /device/linaro/bootloader/edk2/ArmPkg/Drivers/ArmGic/ |
| D | ArmGicCommonDxe.c | 96 EFI_CPU_ARCH_PROTOCOL *Cpu; in InstallAndRegisterInterruptService() local
116 Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); in InstallAndRegisterInterruptService()
124 Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL); in InstallAndRegisterInterruptService()
132 Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, InterruptHandler); in InstallAndRegisterInterruptService()
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/ |
| D | CpuIA32Lib_Edk2.inf | 18 # Component description file for the Cpu IA32 library.
35 X64/Cpu.asm | MSFT
36 X64/Cpu.asm | INTEL
37 X64/Cpu.S | GCC
44 $(EDK_SOURCE)/Foundation/Cpu/Pentium/Include
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| D | CpuIA32Lib.inf | 18 # Component description file for the Cpu IA32 library.
33 X64/Cpu.asm
39 $(EDK_SOURCE)/Foundation/Cpu/Pentium/Include
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| /device/linaro/bootloader/edk2/Omap35xxPkg/InterruptDxe/ |
| D | HardwareInterrupt.c | 317 EFI_CPU_ARCH_PROTOCOL *Cpu; in InterruptDxeInitialize() local
336 Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); in InterruptDxeInitialize()
342 Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL); in InterruptDxeInitialize()
348 Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler); in InterruptDxeInitialize()
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| /device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/VExpress/AcpiTables/ |
| D | Dsdt.asl | 64 Device(CPU0) { // Cluster 0, Cpu 0
68 Device(CPU1) { // Cluster 0, Cpu 1
72 Device(CPU2) { // Cluster 0, Cpu 2
76 Device(CPU3) { // Cluster 0, Cpu 3
80 Device(CPU4) { // Cluster 1, Cpu 0
84 Device(CPU5) { // Cluster 1, Cpu 1
88 Device(CPU6) { // Cluster 1, Cpu 2
92 Device(CPU7) { // Cluster 1, Cpu 3
|
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/ |
| D | Thunk.c | 239 …Status = Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, LegacyBiosNullInterruptHand… in InternalLegacyBiosFarCall()
244 Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, NULL); in InternalLegacyBiosFarCall()
385 Status = Private->Cpu->RegisterInterruptHandler ( in LegacyBiosInitializeThunk()
386 Private->Cpu, in LegacyBiosInitializeThunk()
395 Private->Cpu->RegisterInterruptHandler ( in LegacyBiosInitializeThunk()
396 Private->Cpu, in LegacyBiosInitializeThunk()
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| D | LegacyBios.c | 153 Private->Cpu->FlushDataCache (Private->Cpu, 0xE0000, 0x20000, EfiCpuFlushTypeWriteBackInvalidate); in LegacyBiosGetLegacyRegion()
200 Private->Cpu->FlushDataCache (Private->Cpu, 0xE0000, 0x20000, EfiCpuFlushTypeWriteBackInvalidate); in LegacyBiosCopyLegacyRegion()
334 Private->Cpu->FlushDataCache (Private->Cpu, 0xc0000, 0x40000, EfiCpuFlushTypeWriteBackInvalidate); in ShadowAndStartLegacy16()
544 …Private->Cpu->FlushDataCache (Private->Cpu, Private->BiosStart, (UINT32) LegacyBiosImageSize, EfiC… in ShadowAndStartLegacy16()
835 Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **) &Private->Cpu); in LegacyBiosInstall()
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Core/Dxe/ArchProtocol/ |
| D | ArchProtocolLib.inf | 31 Cpu/Cpu.c
32 Cpu/Cpu.h
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/CpuIA32Lib/ |
| D | CpuIA32Lib.inf | 30 # Component description file for the Cpu IA32 library.
50 X64/Cpu.asm
51 X64/Cpu.S
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| /device/linaro/bootloader/edk2/MdePkg/Library/SmmPeriodicSmiLib/ |
| D | SmmPeriodicSmiLib.c | 69 UINTN Cpu; member
818 if ((PeriodicSmiLibraryHandler->Cpu == PERIODIC_SMI_LIBRARY_ANY_CPU) || in PeriodicSmiDispatchFunction()
819 (PeriodicSmiLibraryHandler->Cpu == gSmst->CurrentlyExecutingCpu) ) { in PeriodicSmiDispatchFunction()
839 PeriodicSmiLibraryHandler->Cpu, in PeriodicSmiDispatchFunction()
919 IN UINTN Cpu, in PeriodicSmiEnable() argument
943 if (Cpu != PERIODIC_SMI_LIBRARY_ANY_CPU && Cpu >= gSmst->NumberOfCpus) { in PeriodicSmiEnable()
962 PeriodicSmiLibraryHandler->Cpu = Cpu; in PeriodicSmiEnable()
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| /device/linaro/bootloader/edk2/Nt32Pkg/CpuRuntimeDxe/ |
| D | CpuRuntimeDxe.inf | 2 # Component description file for Cpu module.
19 BASE_NAME = Cpu
34 Cpu.c
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| D | CpuDriver.h | 56 EFI_CPU_ARCH_PROTOCOL Cpu; member
70 Cpu, \
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| /device/linaro/bootloader/edk2/EmulatorPkg/CpuRuntimeDxe/ |
| D | Cpu.inf | 2 # Component description file for Cpu module.
20 BASE_NAME = Cpu
35 Cpu.c
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| D | CpuDriver.h | 52 EFI_CPU_ARCH_PROTOCOL Cpu; member
65 Cpu, \
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| /device/linaro/bootloader/edk2/MdeModulePkg/Universal/MemoryTest/GenericMemoryTestDxe/ |
| D | LightMemoryTest.c | 331 if (Private->Cpu != NULL) { in WriteMemory()
332 Private->Cpu->FlushDataCache (Private->Cpu, Start, Size, EfiCpuFlushTypeWriteBackInvalidate); in WriteMemory()
442 EFI_CPU_ARCH_PROTOCOL *Cpu; in InitializeMemoryTest() local
472 (VOID **) &Cpu in InitializeMemoryTest()
475 Private->Cpu = Cpu; in InitializeMemoryTest()
798 … Private->Cpu->FlushDataCache (Private->Cpu, TestAddress, 1, EfiCpuFlushTypeWriteBackInvalidate); in PerformAddressDataLineTest()
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Cpu/Itanium/CpuIa64Lib/ |
| D | CpuIA64Lib.inf | 18 # Component description file for the Cpu IA64 library.
34 $(EDK_SOURCE)/Foundation/Cpu/Itanium/Include
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/HdLcdArmVExpressLib/ |
| D | HdLcdArmVExpress.c | 122 EFI_CPU_ARCH_PROTOCOL *Cpu; in LcdPlatformGetVram() local
142 Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); in LcdPlatformGetVram()
146 Status = Cpu->SetMemoryAttributes (Cpu, *VramBaseAddress, *VramSize, EFI_MEMORY_UC); in LcdPlatformGetVram()
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Sample/Platform/ |
| D | EdkLib32.dsc | 24 $(EDK_PREFIX)Foundation\Cpu\Pentium\CpuIA32Lib\CpuIA32Lib.inf
25 $(EDK_PREFIX)Foundation\Cpu\Itanium\CpuIA64Lib\CpuIA64Lib.inf
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| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Core/Dxe/ArchProtocol/Cpu/ |
| D | Cpu.c | 24 #include EFI_ARCH_PROTOCOL_DEFINITION (Cpu)
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/LcdGraphicsOutputDxe/ |
| D | LcdGraphicsOutputDxe.c | 112 EFI_CPU_ARCH_PROTOCOL *Cpu; in LcdPlatformGetVram() local
125 Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); in LcdPlatformGetVram()
129 Status = Cpu->SetMemoryAttributes (Cpu, *VramBaseAddress, *VramSize, EFI_MEMORY_UC); in LcdPlatformGetVram()
|
| /device/linaro/bootloader/edk2/ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/ |
| D | PL111LcdArmVExpress.c | 168 EFI_CPU_ARCH_PROTOCOL *Cpu; in LcdPlatformGetVram() local
191 Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); in LcdPlatformGetVram()
195 Status = Cpu->SetMemoryAttributes(Cpu, *VramBaseAddress, *VramSize, EFI_MEMORY_UC); in LcdPlatformGetVram()
|
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/Juno/AcpiTables/ |
| D | Dsdt.asl | 119 Device(CPU0) { // A57-0: Cluster 0, Cpu 0
126 Device(CPU1) { // A57-1: Cluster 0, Cpu 1
211 Device(CPU2) { // A53-0: Cluster 1, Cpu 0
218 Device(CPU3) { // A53-1: Cluster 1, Cpu 1
225 Device(CPU4) { // A53-2: Cluster 1, Cpu 2
232 Device(CPU5) { // A53-3: Cluster 1, Cpu 3
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| /device/linaro/bootloader/edk2/EmbeddedPkg/Ebl/ |
| D | Hob.c | 193 AsciiPrint ("CPU HOB: Mem %x IO %x\n", Hob.Cpu->SizeOfMemorySpace, Hob.Cpu->SizeOfIoSpace); in EblHobCmd()
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| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Pp2Dxe/ |
| D | Mvpp2Lib.h | 219 IN INT32 Cpu
238 IN INT32 Cpu
257 IN INT32 Cpu
313 IN INT32 Cpu,
327 IN INT32 Cpu
|