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Searched refs:GMAC_CTRL (Results 1 – 2 of 2) sorted by relevance

/device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/MarvellYukonDxe/
Dif_msk.c386 CSR_WRITE_4 (sc, MR_ADDR (port, GMAC_CTRL), gmac); in msk_miibus_statchg()
985 CSR_WRITE_4 (sc, MR_ADDR (i, GMAC_CTRL), GMC_RST_SET); in mskc_reset()
986 CSR_WRITE_4 (sc, MR_ADDR (i, GMAC_CTRL), GMC_RST_CLR); in mskc_reset()
987 CSR_WRITE_4 (sc, MR_ADDR (i, GMAC_CTRL), GMC_F_LOOPB_OFF); in mskc_reset()
989 …CSR_WRITE_4 (sc, MR_ADDR (i, GMAC_CTRL), GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON | GMC_BYP_RETR_… in mskc_reset()
2458 CSR_WRITE_4 (sc, MR_ADDR (port, GMAC_CTRL), GMC_RST_SET); in msk_init()
2459 CSR_WRITE_4 (sc, MR_ADDR (port, GMAC_CTRL), GMC_RST_CLR); in msk_init()
2460 CSR_WRITE_4 (sc, MR_ADDR (port, GMAC_CTRL), GMC_F_LOOPB_OFF); in msk_init()
2462 …CSR_WRITE_4 (sc, MR_ADDR (port, GMAC_CTRL), GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON | GMC_BYP_RE… in msk_init()
2809 CSR_WRITE_4 (sc, MR_ADDR (port, GMAC_CTRL), GMC_PAUSE_OFF); in mskc_stop_if()
Dif_mskreg.h743 #define GMAC_CTRL 0x0f00 /* 32 bit GMAC Control Reg */ macro