| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/NorthCluster/Include/ |
| D | VlvAccess.h | 191 #define McD0PciCfg64(Register) MmPci64 (0, MC_BUS, 0, 0, Reg…
192 #define McD0PciCfg64Or(Register, OrData) MmPci64Or (0, MC_BUS, 0, 0, Reg…
193 #define McD0PciCfg64And(Register, AndData) MmPci64And (0, MC_BUS, 0, 0, Reg…
194 #define McD0PciCfg64AndThenOr(Register, AndData, OrData) MmPci64AndThenOr (0, MC_BUS, 0, 0, Reg…
196 #define McD0PciCfg32(Register) MmPci32 (0, MC_BUS, 0, 0, Reg…
197 #define McD0PciCfg32Or(Register, OrData) MmPci32Or (0, MC_BUS, 0, 0, Reg…
198 #define McD0PciCfg32And(Register, AndData) MmPci32And (0, MC_BUS, 0, 0, Reg…
199 #define McD0PciCfg32AndThenOr(Register, AndData, OrData) MmPci32AndThenOr (0, MC_BUS, 0, 0, Reg…
201 #define McD0PciCfg16(Register) MmPci16 (0, MC_BUS, 0, 0, Reg…
202 #define McD0PciCfg16Or(Register, OrData) MmPci16Or (0, MC_BUS, 0, 0, Reg…
[all …]
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| D | Valleyview.h | 34 #define MC_BUS 0x00 macro
51 #define IGD_BUS_DEV_FUN (MC_BUS << 8) + IGD_DEV_FUN
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Include/ |
| D | QNCAccess.h | 119 #define McD0PciCfg64(Register) QNCMmPci32 (0, MC_BUS, 0, 0, …
120 #define McD0PciCfg64Or(Register, OrData) QNCMmPci32Or (0, MC_BUS, 0, 0, …
121 #define McD0PciCfg64And(Register, AndData) QNCMmPci32And (0, MC_BUS, 0, 0, …
122 #define McD0PciCfg64AndThenOr(Register, AndData, OrData) QNCMmPci32AndThenOr (0, MC_BUS, 0, 0, …
124 #define McD0PciCfg32(Register) QNCMmPci32 (0, MC_BUS, 0, 0, …
125 #define McD0PciCfg32Or(Register, OrData) QNCMmPci32Or (0, MC_BUS, 0, 0, …
126 #define McD0PciCfg32And(Register, AndData) QNCMmPci32And (0, MC_BUS, 0, 0, …
127 #define McD0PciCfg32AndThenOr(Register, AndData, OrData) QNCMmPci32AndThenOr (0, MC_BUS, 0, 0, …
129 #define McD0PciCfg16(Register) QNCMmPci16 (0, MC_BUS, 0, 0, …
130 #define McD0PciCfg16Or(Register, OrData) QNCMmPci16Or (0, MC_BUS, 0, 0, …
[all …]
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| D | QuarkNcSocId.h | 32 #define MC_BUS PCI_BUS_NUMBER_QNC macro
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Dxe/PlatformInit/ |
| D | PlatformInitDxe.c | 29 switch (PciRead16 (PCI_LIB_ADDRESS (MC_BUS, MC_DEV, MC_FUN, PCI_DEVICE_ID_OFFSET))) { in GetQncName()
43 switch (PciRead8 (PCI_LIB_ADDRESS (MC_BUS, MC_DEV, MC_FUN, PCI_REVISION_ID_OFFSET))) { in GetQncName()
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/Library/MultiPlatformLib/ |
| D | MultiPlatformLib.c | 49 PlatformInfoHob->IohSku = MmPci16(0, MC_BUS, MC_DEV, MC_FUN, PCI_DEVICE_ID_OFFSET); in MultiPlatformInfoInit()
51 PlatformInfoHob->IohRevision = MmPci8(0, MC_BUS, MC_DEV, MC_FUN, PCI_REVISION_ID_OFFSET); in MultiPlatformInfoInit()
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Library/IntelQNCLib/ |
| D | IntelQNCLib.c | 118 …QNCMmPci32(0, MC_BUS, MC_DEV, MC_FUN, R_EFI_PCI_SVID) = QNCMmPci32(0, MC_BUS, MC_DEV, MC_FUN, PCI_… in PeiQNCPostMemInit()
449 PciDeviceMmBase (MC_BUS, in IsQncSupported()
481 MC_BUS, in QncGetSocDeviceId()
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| /device/linaro/bootloader/edk2/QuarkSocPkg/QuarkNorthCluster/Library/QNCAccessLib/ |
| D | QNCAccessLib.c | 194 DeviceId = QNCMmPci16(0, MC_BUS, MC_DEV, MC_FUN, PCI_DEVICE_ID_OFFSET); in QncHsmmcWrite()
246 DeviceId = QNCMmPci16(0, MC_BUS, MC_DEV, MC_FUN, PCI_DEVICE_ID_OFFSET); in QncImrWrite()
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformDxe/ |
| D | IchRegTable.c | 49 MC_BUS, MC_DEV, MC_FUN, R_EFI_PCI_SVID, EfiPciWidthUint32,
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| /device/linaro/bootloader/edk2/Vlv2TbltDevicePkg/PlatformPei/ |
| D | Platform.c | 57 #define MC_BUS 0x00
61 #define MC_BUS_DEV_FUN ((MC_BUS << 8) + MC_DEV_FUN)
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| /device/linaro/bootloader/edk2/QuarkPlatformPkg/Platform/Pei/PlatformInit/ |
| D | MrcWrapper.c | 1431 DeviceId = QNCMmPci16(0, MC_BUS, MC_DEV, MC_FUN, PCI_DEVICE_ID_OFFSET); in SetPlatformImrPolicy()
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