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Searched refs:PI_REG (Results 1 – 3 of 3) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
Dsuspend.c220 mmio_clrsetbits_32(PI_REG(ch, 100), 0x3 << 8, 0x2 << 8); in data_training()
223 mmio_clrsetbits_32(PI_REG(ch, 92), in data_training()
228 tmp = mmio_read_32(PI_REG(ch, 174)) >> 8; in data_training()
251 mmio_write_32(PI_REG(ch, 175), 0x00003f7c); in data_training()
253 mmio_clrbits_32(PI_REG(ch, 100), 0x3 << 8); in data_training()
261 mmio_clrsetbits_32(PI_REG(ch, 60), 0x3 << 8, 0x2 << 8); in data_training()
263 mmio_clrsetbits_32(PI_REG(ch, 59), in data_training()
269 tmp = mmio_read_32(PI_REG(ch, 174)) >> 8; in data_training()
296 mmio_write_32(PI_REG(ch, 175), 0x00003f7c); in data_training()
299 mmio_clrbits_32(PI_REG(ch, 60), 0x3 << 8); in data_training()
[all …]
Ddfs.c1030 mmio_write_32(PI_REG(i, 2), tmp); in gen_rk3399_pi_params_f0()
1033 mmio_clrsetbits_32(PI_REG(i, 3), 0xffff, tmp); in gen_rk3399_pi_params_f0()
1035 mmio_clrsetbits_32(PI_REG(i, 7), 0xffff << 16, tmp << 16); in gen_rk3399_pi_params_f0()
1045 mmio_clrsetbits_32(PI_REG(i, 42), 0xff, tmp); in gen_rk3399_pi_params_f0()
1049 mmio_clrsetbits_32(PI_REG(i, 43), 0x1f, tmp); in gen_rk3399_pi_params_f0()
1052 mmio_clrsetbits_32(PI_REG(i, 43), 0x3f << 8, in gen_rk3399_pi_params_f0()
1056 mmio_clrsetbits_32(PI_REG(i, 43), 0x7f << 16, in gen_rk3399_pi_params_f0()
1059 mmio_clrsetbits_32(PI_REG(i, 46), 0xffff << 16, in gen_rk3399_pi_params_f0()
1062 mmio_clrsetbits_32(PI_REG(i, 46), 0x3ff, pdram_timing->trfc); in gen_rk3399_pi_params_f0()
1066 mmio_clrsetbits_32(PI_REG(i, 66), 0xff << 24, in gen_rk3399_pi_params_f0()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
Daddressmap_shared.h96 #define PI_REG(ch, n) (PI_BASE(ch) + (n) * 0x4) macro