Searched refs:R_PCH_SMI_STS (Results 1 – 5 of 5) sorted by relevance
131 IoWrite16 (PchPmioBase + R_PCH_SMI_STS, in ResetShutdown()132 (UINT16)(IoRead16 (PchPmioBase + R_PCH_SMI_STS) | B_PCH_SMI_STS_ON_SLP_EN)); in ResetShutdown()151 IoWrite16 ((UINTN) (PchPmioBase + R_PCH_SMI_STS), Data16); in ResetShutdown()
558 IoWrite16 (mAcpiBaseAddr + R_PCH_SMI_STS,559 (UINT16)(IoRead16 (mAcpiBaseAddr + R_PCH_SMI_STS) | B_PCH_SMI_STS_ON_SLP_EN));
212 SmiSts = IoRead32 (ACPI_BASE_ADDRESS + R_PCH_SMI_STS); in ClearSmiAndWake()269 IoWrite32 (ACPI_BASE_ADDRESS + R_PCH_SMI_STS, SmiSts); in ClearSmiAndWake()
678 RegData32 = IoRead32(AcpiBase + R_PCH_SMI_STS); in EnableAcpiCallback()680 IoWrite32(AcpiBase + R_PCH_SMI_STS, RegData32); in EnableAcpiCallback()
580 #define R_PCH_SMI_STS 0x34 // SMI Status Register macro