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/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/drivers/pwrc/
Dhisi_pwrc.c26 #define CPUIDLE_LOCK_ID(core) (0x6 - (core)) argument
94 static void hisi_cpuhotplug_lock(unsigned int cluster, unsigned int core) in hisi_cpuhotplug_lock() argument
98 lock_id = (cluster << 2) + core; in hisi_cpuhotplug_lock()
103 static void hisi_cpuhotplug_unlock(unsigned int cluster, unsigned int core) in hisi_cpuhotplug_unlock() argument
107 lock_id = (cluster << 2) + core; in hisi_cpuhotplug_unlock()
113 void hisi_cpuidle_lock(unsigned int cluster, unsigned int core) in hisi_cpuidle_lock() argument
117 hisi_resource_lock(CPUIDLE_LOCK_ID(core), offset); in hisi_cpuidle_lock()
121 void hisi_cpuidle_unlock(unsigned int cluster, unsigned int core) in hisi_cpuidle_unlock() argument
125 hisi_resource_unlock(CPUIDLE_LOCK_ID(core), offset); in hisi_cpuidle_unlock()
138 void hisi_set_cpuidle_flag(unsigned int cluster, unsigned int core) in hisi_set_cpuidle_flag() argument
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Dhisi_pwrc.h33 void hisi_cpuidle_lock(unsigned int cluster, unsigned int core);
34 void hisi_cpuidle_unlock(unsigned int cluster, unsigned int core);
35 void hisi_set_cpuidle_flag(unsigned int cluster, unsigned int core);
36 void hisi_clear_cpuidle_flag(unsigned int cluster, unsigned int core);
37 void hisi_set_cpu_boot_flag(unsigned int cluster, unsigned int core);
38 void hisi_clear_cpu_boot_flag(unsigned int cluster, unsigned int core);
40 void hisi_enter_core_idle(unsigned int cluster, unsigned int core);
41 void hisi_enter_cluster_idle(unsigned int cluster, unsigned int core);
43 void hisi_enter_ap_suspend(unsigned int cluster, unsigned int core);
48 int hisi_test_pwrdn_allcores(unsigned int cluster, unsigned int core);
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/device/linaro/hikey/hifi/xaf/hifi-dpf/include/sys/xt-shmem/
Dxf-ipc.h93 static inline void xf_ipi_enable(u32 core, int on) in xf_ipi_enable() argument
96 _xtos_ints_on(1 << XF_PROXY_IPI_NUM(core)); in xf_ipi_enable()
98 _xtos_ints_off(1 << XF_PROXY_IPI_NUM(core)); in xf_ipi_enable()
102 static inline void xf_ipi_wait(u32 core) in xf_ipi_wait() argument
104 xf_core_ro_data_t *ro = XF_CORE_RO_DATA(core); in xf_ipi_wait()
107 xf_ipi_enable(core, 1); in xf_ipi_wait()
113 xf_ipi_enable(core, 0); in xf_ipi_wait()
131 static inline void xf_ipi_wait(u32 core) in xf_ipi_wait() argument
163 static inline void xf_ipi_resume(u32 core) in xf_ipi_resume() argument
165 xf_core_ro_data_t *ro = XF_CORE_RO_DATA(core); in xf_ipi_resume()
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Dxf-mem.h48 static inline void xf_shmem_alloc_addref(u32 core, xf_message_t *m) in xf_shmem_alloc_addref() argument
53 static inline void xf_shmem_alloc_rmref(u32 core, xf_message_t *m) in xf_shmem_alloc_rmref() argument
62 static inline void * xf_mem_alloc(u32 size, u32 align, u32 core, u32 shared) in xf_mem_alloc() argument
73 return xf_mm_alloc(&XF_CORE_DATA(core)->local_pool, size); in xf_mem_alloc()
77 #define xf_mem_alloc(size, align, core, shared) \ argument
82 __data = (xf_mem_alloc)(size, align, core, shared); \
83 TRACE(1, _b("alloc-%u: %p[%u] (shared=%u)"), core, __data, size, shared); \
88 static inline void xf_mem_free(void *p, u32 size, u32 core, u32 shared) in xf_mem_free() argument
100 xf_mm_free(&XF_CORE_DATA(core)->local_pool, p, size); in xf_mem_free()
104 #define xf_mem_free(p, size, core, shared) \ argument
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Dxf-shmem.h101 #define XF_SHMEM_DATA(core) \ argument
102 ((xf_shmem_data_t *)XF_CORE_DATA(core)->shmem)
113 #define XF_PROXY_READ(core, field) \ argument
114 __XF_PROXY_READ_##field(XF_SHMEM_DATA(core))
116 #define XF_PROXY_WRITE(core, field, v) \ argument
117 __XF_PROXY_WRITE_##field(XF_SHMEM_DATA(core), (v))
146 #define XF_PROXY_COMMAND(core, idx) \ argument
147 (&XF_SHMEM_DATA((core))->remote.command[(idx)])
150 #define XF_PROXY_RESPONSE(core, idx) \ argument
151 (&XF_SHMEM_DATA((core))->local.response[(idx)])
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/device/google/contexthub/firmware/
DAndroid.mk27 os/core/appSec.c \
28 os/core/eventQ.c \
29 os/core/floatRt.c \
30 os/core/heap.c \
31 os/core/hostIntf.c \
32 os/core/hostIntfI2c.c \
33 os/core/hostIntfSpi.c \
34 os/core/nanohubCommand.c \
35 os/core/nanohub_chre.c \
36 os/core/osApi.c \
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Dfirmware.mk76 SRCS_bl += ../lib/nanohub/sha2.c ../lib/nanohub/rsa.c ../lib/nanohub/aes.c os/core/seos.c
79 SRCS_os += os/core/printf.c os/core/timer.c os/core/seos.c os/core/heap.c os/core/slab.c os/core/sp…
80 SRCS_os += os/core/hostIntf.c os/core/hostIntfI2c.c os/core/hostIntfSpi.c os/core/nanohubCommand.c …
81 SRCS_os += os/core/eventQ.c os/core/osApi.c os/core/appSec.c os/core/simpleQ.c os/core/floatRt.c os…
83 SRCS_bl += os/core/bl.c
86 SRCS_bl += os/core/printf.c
/device/linaro/hikey/hifi/xaf/hifi-dpf/core/
Dxf-core.c94 static int xf_proxy_register(u32 core, xf_message_t *m) in xf_proxy_register() argument
96 xf_core_data_t *cd = XF_CORE_DATA(core); in xf_proxy_register()
105 if ((component = xf_component_factory(core, m->buffer, m->length)) == NULL) in xf_proxy_register()
120 component->id = __XF_PORT_SPEC(core, client, 0); in xf_proxy_register()
128 TRACE(REG, _b("registered client: %u:%u (%s)"), core, client, (xf_id_t)m->buffer); in xf_proxy_register()
137 static int xf_proxy_alloc(u32 core, xf_message_t *m) in xf_proxy_alloc() argument
140 XF_CHK_ERR(xf_shmem_enabled(core), -EPERM); in xf_proxy_alloc()
143 xf_shmem_alloc(core, m); in xf_proxy_alloc()
152 static int xf_proxy_free(u32 core, xf_message_t *m) in xf_proxy_free() argument
155 XF_CHK_ERR(xf_shmem_enabled(core), -EPERM); in xf_proxy_free()
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Dxf-shmem.c111 static inline xf_message_t * xf_msg_proxy_get(u32 core) in xf_msg_proxy_get() argument
113 xf_core_rw_data_t *rw = XF_CORE_RW_DATA(core); in xf_msg_proxy_get()
117 xf_mutex_lock(core); in xf_msg_proxy_get()
141 xf_mutex_unlock(core); in xf_msg_proxy_get()
151 static u32 xf_shmem_process_input(u32 core) in xf_shmem_process_input() argument
159 read_idx = XF_PROXY_READ(core, cmd_read_idx); in xf_shmem_process_input()
160 write_idx = XF_PROXY_READ(core, cmd_write_idx); in xf_shmem_process_input()
170 if ((m = xf_msg_pool_get(&XF_CORE_RO_DATA(core)->pool)) == NULL) in xf_shmem_process_input()
180 command = XF_PROXY_COMMAND(core, XF_QUEUE_IDX(read_idx)); in xf_shmem_process_input()
189 m->buffer = xf_ipc_a2b(core, command->address); in xf_shmem_process_input()
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Dxf-isr.c45 u32 core = XF_MSG_DST_CORE(m->id); in xf_msg_schedule_isr() local
46 xf_core_data_t *cd = XF_CORE_DATA(core); in xf_msg_schedule_isr()
52 xf_ipi_resume(core); in xf_msg_schedule_isr()
59 u32 core = XF_MSG_DST_CORE(m->id); in xf_msg_complete_isr() local
60 xf_core_data_t *cd = XF_CORE_DATA(core); in xf_msg_complete_isr()
66 xf_ipi_resume(core); in xf_msg_complete_isr()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_pm.c60 unsigned int core = mpidr & MPIDR_CPU_MASK; in hikey960_pwr_domain_on() local
65 hisi_set_cpu_boot_flag(cluster, core); in hikey960_pwr_domain_on()
67 mmio_write_32(CRG_REG_BASE + CRG_RVBAR(cluster, core), in hikey960_pwr_domain_on()
71 hisi_powerup_core(cluster, core); in hikey960_pwr_domain_on()
73 hisi_powerup_cluster(cluster, core); in hikey960_pwr_domain_on()
91 unsigned int core = mpidr & MPIDR_CPU_MASK; in hikey960_pwr_domain_off() local
101 hisi_clear_cpu_boot_flag(cluster, core); in hikey960_pwr_domain_off()
102 hisi_powerdn_core(cluster, core); in hikey960_pwr_domain_off()
105 if (hisi_test_cpu_down(cluster, core)) { in hikey960_pwr_domain_off()
112 hisi_powerdn_cluster(cluster, core); in hikey960_pwr_domain_off()
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/device/linaro/hikey/hifi/xaf/hifi-dpf/include/sys/xt-shmem/board-hikey/
Dxf-board.h39 #define XF_CFG_SHMEM_ADDRESS(core) HIFI_HIKEY_SHARE_MEM_ADDR argument
42 #define XF_CFG_TRACE_START(core) 0x78000000 argument
43 #define XF_CFG_TRACE_END(core) 0x7FFFFFFF argument
58 #define SYS_IPC_CPUIRST(base, core) WORD_REF(base + 0x804 + ((core) << 3)) argument
65 #define SYS_IPC_CPUIMST(base, core) WORD_REF(base + 0x800 + ((core) * 8)) argument
75 #define XF_PROXY_IPI_NUM(core) 15 argument
92 #define XF_PROXY_NOTIFY_PEER(core) h2_wake_core()
95 #define XF_PROXY_SYNC_PEER(core) h2_local_ack()
128 #define XF_PROXY_NOTIFY_PEER(core) h2_wake_core() argument
130 #define XF_PROXY_SYNC_PEER(core) h2_local_ack() argument
/device/linaro/hikey/hifi/xaf/hifi-dpf/include/
Dxf-core.h82 #define XF_CORE_RO_DATA(core) ((xf_core_ro_data_t *)(&xf_core_ro_data[(core)])) argument
85 #define XF_CORE_RW_DATA(core) ((xf_core_rw_data_t *)(&xf_core_rw_data[(core)])) argument
144 extern int xf_core_init(u32 core);
150 extern void xf_core_service(u32 core);
Dxf-trace.h72 extern void xf_trace_submit(u32 core, xf_message_t *m);
75 extern void xf_trace_flush(u32 core, xf_message_t *m);
79 #define xf_trace_submit(core, m) (void)0 argument
80 #define xf_trace_flush(core, m) (void)0 argument
Dxf-opcode.h47 #define __XF_PORT_SPEC(core, id, port) ((core) | ((id) << 2) | ((port) << 8)) argument
71 #define __XF_AP_PROXY(core) ((core) | 0x8000) argument
72 #define __XF_DSP_PROXY(core) ((core) | 0x8000) argument
73 #define __XF_AP_CLIENT(core, client) ((core) | ((client) << 6) | 0x8000) argument
/device/linaro/hikey/hifi/xaf/host-apf/proxy/
Dxf-proxy.c83 msg.id = __XF_MSG_ID(__XF_AP_CLIENT(proxy->core, handle->client), m->id);
138 static inline int xf_client_register(xf_proxy_t *proxy, xf_handle_t *handle, xf_id_t id, u32 core) in xf_client_register() argument
144 msg.id = __XF_MSG_ID(__XF_AP_PROXY(proxy->core), __XF_DSP_PROXY(core)); in xf_client_register()
175 msg.id = __XF_MSG_ID(__XF_AP_PROXY(proxy->core), handle->id); in xf_client_unregister()
194 u32 core = proxy->core; in xf_proxy_buffer_alloc() local
198 msg.id = __XF_MSG_ID(__XF_AP_PROXY(core), __XF_DSP_PROXY(core)); in xf_proxy_buffer_alloc()
215 TRACE(MEM, _b("proxy-%u: allocated [%p:%u]"), core, *buffer, length); in xf_proxy_buffer_alloc()
223 u32 core = proxy->core; in xf_proxy_buffer_free() local
227 msg.id = __XF_MSG_ID(__XF_AP_PROXY(core), __XF_DSP_PROXY(core)); in xf_proxy_buffer_free()
238 TRACE(MEM, _b("proxy-%u: free [%p:%u]"), core, buffer, length); in xf_proxy_buffer_free()
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/device/linaro/hikey/hifi/xaf/hifi-dpf/ipc/xt-shmem/
Dxf-main.c102 int xf_ipc_init(u32 core) in xf_ipc_init() argument
104 xf_core_data_t *cd = XF_CORE_DATA(core); in xf_ipc_init()
105 xf_shmem_data_t *shmem = (xf_shmem_data_t *)XF_CFG_SHMEM_ADDRESS(core); in xf_ipc_init()
123 static void xf_core_loop(u32 core) in xf_core_loop() argument
126 xf_core_init(core); in xf_core_loop()
136 xf_ipi_wait(core); in xf_core_loop()
139 xf_core_service(core); in xf_core_loop()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/include/
Dhisi_ipc.h15 void hisi_ipc_pm_on_off(unsigned int core, unsigned int cluster,
17 void hisi_ipc_pm_suspend(unsigned int core, unsigned int cluster,
19 void hisi_ipc_psci_system_off(unsigned int core, unsigned int cluster);
20 void hisi_ipc_psci_system_reset(unsigned int core, unsigned int cluster,
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/drivers/ipc/
Dhisi_ipc.c131 void hisi_ipc_pm_on_off(unsigned int core, unsigned int cluster, in hisi_ipc_pm_on_off() argument
137 enum lpm3_mbox_id mailbox = (enum lpm3_mbox_id)(LPM3_MBX0 + core); in hisi_ipc_pm_on_off()
140 cmdpara = IPC_CMD_PARA(0, core); in hisi_ipc_pm_on_off()
145 void hisi_ipc_pm_suspend(unsigned int core, unsigned int cluster, in hisi_ipc_pm_suspend() argument
151 enum lpm3_mbox_id mailbox = (enum lpm3_mbox_id)(LPM3_MBX0 + core); in hisi_ipc_pm_suspend()
158 cmdpara = IPC_CMD_PARA(1, core); in hisi_ipc_pm_suspend()
163 void hisi_ipc_psci_system_off(unsigned int core, unsigned int cluster) in hisi_ipc_psci_system_off() argument
168 enum lpm3_mbox_id mailbox = (enum lpm3_mbox_id)(LPM3_MBX0 + core); in hisi_ipc_psci_system_off()
176 void hisi_ipc_psci_system_reset(unsigned int core, unsigned int cluster, in hisi_ipc_psci_system_reset() argument
182 enum lpm3_mbox_id mailbox = (enum lpm3_mbox_id)(LPM3_MBX0 + core); in hisi_ipc_psci_system_reset()
/device/linaro/hikey/hifi/xaf/hifi-dpf/app/
Dxa-factory.c57 xf_component_t * (*factory)(u32 core, xa_codec_func_t process);
84 extern xf_component_t * xa_audio_codec_factory(u32 core, xa_codec_func_t process);
85 extern xf_component_t * xa_audio_fx_factory(u32 core, xa_codec_func_t process);
86 extern xf_component_t * xa_mixer_factory(u32 core, xa_codec_func_t process);
87 extern xf_component_t * xa_renderer_factory(u32 core,xa_codec_func_t process);
144 xf_component_t * xf_component_factory(u32 core, xf_id_t id, u32 length) in xf_component_factory() argument
155 return xf_component_id[i].factory(core, xf_component_id[i].process); in xf_component_factory()
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/distutils/tests/
Dtest_core.py4 import distutils.core
65 distutils.core.run_setup(
78 distutils.core.run_setup(
90 distutils.core.setup(name='bar')
94 distutils.core.DEBUG = True
97 distutils.core.setup(name='bar')
99 distutils.core.DEBUG = False
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/
Dnvg.c199 int32_t nvg_online_core(uint32_t ari_base, uint32_t core) in nvg_online_core() argument
209 if ((core >= (uint32_t)MCE_CORE_ID_MAX) || (cpu == core)) { in nvg_online_core()
210 ERROR("%s: unsupported core id (%d)\n", __func__, core); in nvg_online_core()
216 if ((impl == DENVER_IMPL) && ((core == 2U) || (core == 3U))) { in nvg_online_core()
217 ERROR("%s: unknown core id (%d)\n", __func__, core); in nvg_online_core()
222 ((uint64_t)core & MCE_CORE_ID_MASK)); in nvg_online_core()
/device/linaro/hikey/hifi/xaf/host-apf/include/
Dxf-opcode.h40 #define __XF_PORT_SPEC(core, id, port) ((core) | ((id) << 2) | ((port) << 8)) argument
64 #define __XF_AP_PROXY(core) ((core) | 0x8000) argument
65 #define __XF_DSP_PROXY(core) ((core) | 0x8000) argument
66 #define __XF_AP_CLIENT(core, client) ((core) | ((client) << 6) | 0x8000) argument
/device/linaro/bootloader/arm-trusted-firmware/docs/
Dpsci-pd-tree.rst44 #. The attributes of a core power domain differ from the attributes of power
45 domains at higher levels. For example, only a core power domain can be identified
47 performing a power management operation on the core power domain.
133 unique number (core index) between ``0`` and ``PLAT_CORE_COUNT - 1`` to each core
137 ``plat_core_pos_by_mpidr(mpidr)`` will return the core index for the core
139 which is not allocated or corresponds to an absent core. The semantics of this
143 Another mandatory API, ``plat_my_core_pos()`` has been added to return the core
144 index for the calling core. This API provides a more lightweight mechanism to get
145 the index since there is no need to validate the MPIDR of the calling core.
147 The platform should assign the core indices (as illustrated in the diagram above)
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/device/linaro/hikey/hifi/xaf/hifi-dpf/audio/
Dxa-class-base.c53 static XA_ERRORCODE xa_base_preinit(XACodecBase *base, u32 core) in xa_base_preinit() argument
64 XMALLOC(&base->api, n, 4, core); in xa_base_preinit()
73 XMALLOC(&base->mem_tabs, n, 4, core); in xa_base_preinit()
85 static XA_ERRORCODE xa_base_postinit(XACodecBase *base, u32 core) in xa_base_postinit() argument
96 base->scratch = XF_CORE_DATA(core)->scratch; in xa_base_postinit()
133 XMALLOC(&base->persist, size, align, core); in xa_base_postinit()
145 CODEC_API(base, memtab, i, type, size, align, core); in xa_base_postinit()
491 void xa_base_destroy(XACodecBase *base, u32 size, u32 core) in xa_base_destroy() argument
494 xf_mm_free_buffer(&base->persist, core); in xa_base_destroy()
495 xf_mm_free_buffer(&base->mem_tabs, core); in xa_base_destroy()
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