Home
last modified time | relevance | path

Searched refs:cpu_id (Results 1 – 20 of 20) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/
Dplat_psci.c33 unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr); in zynqmp_nopmu_pwr_domain_on() local
37 if (cpu_id == -1) in zynqmp_nopmu_pwr_domain_on()
41 mmio_write_32(APU_RVBAR_L_0 + (cpu_id << 3), zynqmp_sec_entry); in zynqmp_nopmu_pwr_domain_on()
42 mmio_write_32(APU_RVBAR_H_0 + (cpu_id << 3), zynqmp_sec_entry >> 32); in zynqmp_nopmu_pwr_domain_on()
46 r &= ~(1 << APU_CONFIG_0_VINITHI_SHIFT << cpu_id); in zynqmp_nopmu_pwr_domain_on()
51 r &= ~(1 << cpu_id); in zynqmp_nopmu_pwr_domain_on()
55 mmio_write_32(PMU_GLOBAL_REQ_PWRUP_EN, 1 << cpu_id); in zynqmp_nopmu_pwr_domain_on()
56 mmio_write_32(PMU_GLOBAL_REQ_PWRUP_TRIG, 1 << cpu_id); in zynqmp_nopmu_pwr_domain_on()
58 while (mmio_read_32(PMU_GLOBAL_REQ_PWRUP_STATUS) & (1 << cpu_id)) in zynqmp_nopmu_pwr_domain_on()
64 CRF_APB_RST_FPD_APU_ACPU_RESET) << cpu_id); in zynqmp_nopmu_pwr_domain_on()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/flowctrl/
Dflowctrl.c44 static inline void tegra_fc_cc4_ctrl(int cpu_id, uint32_t val) in tegra_fc_cc4_ctrl() argument
46 mmio_write_32(flowctrl_offset_cc4_ctrl[cpu_id], val); in tegra_fc_cc4_ctrl()
47 val = mmio_read_32(flowctrl_offset_cc4_ctrl[cpu_id]); in tegra_fc_cc4_ctrl()
50 static inline void tegra_fc_cpu_csr(int cpu_id, uint32_t val) in tegra_fc_cpu_csr() argument
52 mmio_write_32(flowctrl_offset_cpu_csr[cpu_id], val); in tegra_fc_cpu_csr()
53 val = mmio_read_32(flowctrl_offset_cpu_csr[cpu_id]); in tegra_fc_cpu_csr()
56 static inline void tegra_fc_halt_cpu(int cpu_id, uint32_t val) in tegra_fc_halt_cpu() argument
58 mmio_write_32(flowctrl_offset_halt_cpu[cpu_id], val); in tegra_fc_halt_cpu()
59 val = mmio_read_32(flowctrl_offset_halt_cpu[cpu_id]); in tegra_fc_halt_cpu()
62 static void tegra_fc_prepare_suspend(int cpu_id, uint32_t csr) in tegra_fc_prepare_suspend() argument
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/
Dpmu.c33 static inline uint32_t get_cpus_pwr_domain_cfg_info(uint32_t cpu_id) in get_cpus_pwr_domain_cfg_info() argument
37 pd_reg = mmio_read_32(PMU_BASE + PMU_PWRDN_CON) & BIT(cpu_id); in get_cpus_pwr_domain_cfg_info()
38 apm_reg = mmio_read_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id)) & in get_cpus_pwr_domain_cfg_info()
51 static int cpus_power_domain_on(uint32_t cpu_id) in cpus_power_domain_on() argument
55 cpu_pd = PD_CPU0 + cpu_id; in cpus_power_domain_on()
56 cfg_info = get_cpus_pwr_domain_cfg_info(cpu_id); in cpus_power_domain_on()
60 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
65 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
72 WARN("%s: cpu%d is not in off,!\n", __func__, cpu_id); in cpus_power_domain_on()
76 mmio_write_32(PMU_BASE + PMU_CPUAPM_CON(cpu_id), in cpus_power_domain_on()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/
Dplat_topology.c22 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
24 cpu_id = mpidr & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
27 cpu_id += (cluster_id >> PLAT_RK_CLST_TO_CPUID_SHIFT); in plat_core_pos_by_mpidr()
29 if (cpu_id >= PLATFORM_CORE_COUNT) in plat_core_pos_by_mpidr()
32 return cpu_id; in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_topology.c30 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
33 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
42 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
45 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_topology.c43 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
51 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
60 if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) in plat_core_pos_by_mpidr()
63 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_topology.c43 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
51 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
60 if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER) in plat_core_pos_by_mpidr()
63 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/common/drivers/pmu/
Dpmu_com.h80 static int check_cpu_wfie(uint32_t cpu_id, uint32_t wfie_msk) in check_cpu_wfie() argument
84 if (cpu_id >= PLATFORM_CLUSTER0_CORE_COUNT) { in check_cpu_wfie()
86 cpu_id -= PLATFORM_CLUSTER0_CORE_COUNT; in check_cpu_wfie()
92 wfie_msk <<= (clstb_cpu_wfe + cpu_id); in check_cpu_wfie()
94 wfie_msk <<= (clstl_cpu_wfe + cpu_id); in check_cpu_wfie()
104 cluster_id, cpu_id, wfie_msk); in check_cpu_wfie()
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/
Darm_topology.c18 unsigned int cluster_id, cpu_id; in arm_check_mpidr() local
28 cpu_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
33 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
45 if (cpu_id >= plat_arm_get_cluster_core_count(mpidr)) in arm_check_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/
Dplat_topology.c63 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
71 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
80 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
83 return (cpu_id + (cluster_id * 4)); in plat_core_pos_by_mpidr()
Dplat_pm.c314 unsigned long cpu_id; in plat_affinst_on() local
325 cpu_id = mpidr & MPIDR_CPU_MASK; in plat_affinst_on()
329 rv = (uintptr_t)&mt8173_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_on()
331 rv = (uintptr_t)&mt8173_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_on()
335 cluster_id, cpu_id, mmio_read_32(rv)); in plat_affinst_on()
347 unsigned long cpu_id; in plat_power_domain_on() local
351 cpu_id = mpidr & MPIDR_CPU_MASK; in plat_power_domain_on()
355 rv = (uintptr_t)&mt8173_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; in plat_power_domain_on()
357 rv = (uintptr_t)&mt8173_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; in plat_power_domain_on()
361 cluster_id, cpu_id, mmio_read_32(rv)); in plat_power_domain_on()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/board/fvp/
Dfvp_topology.c59 unsigned int clus_id, cpu_id, thread_id; in plat_core_pos_by_mpidr() local
64 cpu_id = MPIDR_AFFLVL1_VAL(mpidr); in plat_core_pos_by_mpidr()
68 cpu_id = MPIDR_AFFLVL0_VAL(mpidr); in plat_core_pos_by_mpidr()
74 if (cpu_id >= FVP_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
Dpmu.c444 static inline uint32_t get_cpus_pwr_domain_cfg_info(uint32_t cpu_id) in get_cpus_pwr_domain_cfg_info() argument
446 assert(cpu_id < PLATFORM_CORE_COUNT); in get_cpus_pwr_domain_cfg_info()
447 return core_pm_cfg_info[cpu_id]; in get_cpus_pwr_domain_cfg_info()
450 static inline void set_cpus_pwr_domain_cfg_info(uint32_t cpu_id, uint32_t value) in set_cpus_pwr_domain_cfg_info() argument
452 assert(cpu_id < PLATFORM_CORE_COUNT); in set_cpus_pwr_domain_cfg_info()
453 core_pm_cfg_info[cpu_id] = value; in set_cpus_pwr_domain_cfg_info()
455 flush_dcache_range((uintptr_t)&core_pm_cfg_info[cpu_id], in set_cpus_pwr_domain_cfg_info()
460 static int cpus_power_domain_on(uint32_t cpu_id) in cpus_power_domain_on() argument
463 uint32_t cpu_pd = PD_CPUL0 + cpu_id; in cpus_power_domain_on()
472 cfg_info = get_cpus_pwr_domain_cfg_info(cpu_id); in cpus_power_domain_on()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/
Dplat_pm.c240 unsigned long cpu_id; in plat_affinst_on() local
251 cpu_id = mpidr & MPIDR_CPU_MASK; in plat_affinst_on()
255 rv = (uintptr_t)&mt6795_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_on()
257 rv = (uintptr_t)&mt6795_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_on()
261 cluster_id, cpu_id, mmio_read_32(rv)); in plat_affinst_on()
317 unsigned long cpu_id; in plat_affinst_suspend() local
324 cpu_id = mpidr & MPIDR_CPU_MASK; in plat_affinst_suspend()
328 rv = (uintptr_t)&mt6795_mcucfg->mp1_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_suspend()
330 rv = (uintptr_t)&mt6795_mcucfg->mp0_rv_addr[cpu_id].rv_addr_lw; in plat_affinst_suspend()
/device/linaro/bootloader/arm-trusted-firmware/plat/qemu/
Dtopology.c38 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
45 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
50 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/
Duniphier_topology.c29 unsigned int cluster_id, cpu_id; in plat_core_pos_by_mpidr() local
35 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
36 if (cpu_id >= UNIPHIER_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_setup.c249 unsigned int cluster_id, cpu_id, pos; in plat_core_pos_by_mpidr() local
252 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
265 if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) in plat_core_pos_by_mpidr()
269 pos = cpu_id + (cluster_id << 2); in plat_core_pos_by_mpidr()
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt8173/drivers/spm/
Dspm_mcdi.c406 unsigned long cpu_id = mpidr & MPIDR_CPU_MASK; in spm_mcdi_set_cputop_pwrctrl_for_cluster_off() local
414 if (i == cpu_id) in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
424 if (i == cpu_id) in spm_mcdi_set_cputop_pwrctrl_for_cluster_off()
/device/linaro/bootloader/edk2/StdLib/Include/Arm/machine/
Dcpufunc.h157 #define cpu_id() cpufuncs.cf_id() macro
/device/linaro/bootloader/arm-trusted-firmware/docs/
Dplatform-migration-guide.rst368 linear index = cpu_id + (cluster_id * 4)
370 cpu_id = 8-bit value in MPIDR at affinity level 0