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/art/compiler/utils/x86/
Dassembler_x86.h335 void movl(Register dst, const Immediate& src);
336 void movl(Register dst, Register src);
338 void movl(Register dst, const Address& src);
339 void movl(const Address& dst, Register src);
340 void movl(const Address& dst, const Immediate& imm);
341 void movl(const Address& dst, Label* lbl);
343 void movntl(const Address& dst, Register src);
345 void blsi(Register dst, Register src); // no addr variant (for now)
346 void blsmsk(Register dst, Register src); // no addr variant (for now)
347 void blsr(Register dst, Register src); // no addr varianr (for now)
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Dassembler_x86.cc140 void X86Assembler::movl(Register dst, const Immediate& imm) { in movl() argument
142 EmitUint8(0xB8 + dst); in movl()
147 void X86Assembler::movl(Register dst, Register src) { in movl() argument
150 EmitRegisterOperand(src, dst); in movl()
154 void X86Assembler::movl(Register dst, const Address& src) { in movl() argument
157 EmitOperand(dst, src); in movl()
161 void X86Assembler::movl(const Address& dst, Register src) { in movl() argument
164 EmitOperand(src, dst); in movl()
168 void X86Assembler::movl(const Address& dst, const Immediate& imm) { in movl() argument
171 EmitOperand(0, dst); in movl()
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/art/compiler/utils/x86_64/
Dassembler_x86_64.h379 void movq(CpuRegister dst, const Immediate& src);
380 void movl(CpuRegister dst, const Immediate& src);
381 void movq(CpuRegister dst, CpuRegister src);
382 void movl(CpuRegister dst, CpuRegister src);
384 void movntl(const Address& dst, CpuRegister src);
385 void movntq(const Address& dst, CpuRegister src);
387 void movq(CpuRegister dst, const Address& src);
388 void movl(CpuRegister dst, const Address& src);
389 void movq(const Address& dst, CpuRegister src);
390 void movq(const Address& dst, const Immediate& imm);
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/art/compiler/optimizing/
Dcode_generator_vector_x86.cc64 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecReplicateScalar() local
69 cpu_has_avx ? __ vxorps(dst, dst, dst) : __ xorps(dst, dst); in VisitVecReplicateScalar()
78 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
79 __ punpcklbw(dst, dst); in VisitVecReplicateScalar()
80 __ punpcklwd(dst, dst); in VisitVecReplicateScalar()
81 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
86 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
87 __ punpcklwd(dst, dst); in VisitVecReplicateScalar()
88 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
92 __ movd(dst, locations->InAt(0).AsRegister<Register>()); in VisitVecReplicateScalar()
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Dcode_generator_vector_x86_64.cc59 XmmRegister dst = locations->Out().AsFpuRegister<XmmRegister>(); in VisitVecReplicateScalar() local
64 cpu_has_avx ? __ vxorps(dst, dst, dst) : __ xorps(dst, dst); in VisitVecReplicateScalar()
73 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
74 __ punpcklbw(dst, dst); in VisitVecReplicateScalar()
75 __ punpcklwd(dst, dst); in VisitVecReplicateScalar()
76 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
81 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
82 __ punpcklwd(dst, dst); in VisitVecReplicateScalar()
83 __ pshufd(dst, dst, Immediate(0)); in VisitVecReplicateScalar()
87 __ movd(dst, locations->InAt(0).AsRegister<CpuRegister>(), /*64-bit*/ false); in VisitVecReplicateScalar()
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Dcode_generator_vector_arm_vixl.cc56 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecReplicateScalar() local
62 __ Vdup(Untyped8, dst, InputRegisterAt(instruction, 0)); in VisitVecReplicateScalar()
67 __ Vdup(Untyped16, dst, InputRegisterAt(instruction, 0)); in VisitVecReplicateScalar()
71 __ Vdup(Untyped32, dst, InputRegisterAt(instruction, 0)); in VisitVecReplicateScalar()
137 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecReduce() local
143 __ Vpadd(DataTypeValue::I32, dst, src, src); in VisitVecReduce()
146 __ Vpmin(DataTypeValue::S32, dst, src, src); in VisitVecReduce()
149 __ Vpmax(DataTypeValue::S32, dst, src, src); in VisitVecReduce()
174 vixl32::DRegister dst = DRegisterFrom(locations->Out()); in VisitVecNeg() local
179 __ Vneg(DataTypeValue::S8, dst, src); in VisitVecNeg()
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Dcode_generator_vector_arm64.cc84 VRegister dst = VRegisterFrom(locations->Out()); in VisitVecReplicateScalar() local
91 __ Movi(dst.V16B(), Int64FromLocation(src_loc)); in VisitVecReplicateScalar()
93 __ Dup(dst.V16B(), InputRegisterAt(instruction, 0)); in VisitVecReplicateScalar()
100 __ Movi(dst.V8H(), Int64FromLocation(src_loc)); in VisitVecReplicateScalar()
102 __ Dup(dst.V8H(), InputRegisterAt(instruction, 0)); in VisitVecReplicateScalar()
108 __ Movi(dst.V4S(), Int64FromLocation(src_loc)); in VisitVecReplicateScalar()
110 __ Dup(dst.V4S(), InputRegisterAt(instruction, 0)); in VisitVecReplicateScalar()
116 __ Movi(dst.V2D(), Int64FromLocation(src_loc)); in VisitVecReplicateScalar()
118 __ Dup(dst.V2D(), XRegisterFrom(src_loc)); in VisitVecReplicateScalar()
124 __ Fmov(dst.V4S(), src_loc.GetConstant()->AsFloatConstant()->GetValue()); in VisitVecReplicateScalar()
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/art/runtime/
Dreflection-inl.h36 JValue* dst) { in ConvertPrimitiveValueNoThrow() argument
39 dst->SetJ(src.GetJ()); in ConvertPrimitiveValueNoThrow()
50 dst->SetS(src.GetI()); in ConvertPrimitiveValueNoThrow()
57 dst->SetI(src.GetI()); in ConvertPrimitiveValueNoThrow()
64 dst->SetJ(src.GetI()); in ConvertPrimitiveValueNoThrow()
71 dst->SetF(src.GetI()); in ConvertPrimitiveValueNoThrow()
74 dst->SetF(src.GetJ()); in ConvertPrimitiveValueNoThrow()
81 dst->SetD(src.GetI()); in ConvertPrimitiveValueNoThrow()
84 dst->SetD(src.GetJ()); in ConvertPrimitiveValueNoThrow()
87 dst->SetD(src.GetF()); in ConvertPrimitiveValueNoThrow()
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Dwrite_barrier-inl.h30 inline void WriteBarrier::ForFieldWrite(ObjPtr<mirror::Object> dst, in ForFieldWrite() argument
37 GetCardTable()->MarkCard(dst.Ptr()); in ForFieldWrite()
40 inline void WriteBarrier::ForArrayWrite(ObjPtr<mirror::Object> dst, in ForArrayWrite() argument
43 GetCardTable()->MarkCard(dst.Ptr()); in ForArrayWrite()
/art/libartbase/base/
Dendian_utils.h86 inline void Write1BE(uint8_t** dst, uint8_t value) { in Write1BE() argument
87 Set1(*dst, value); in Write1BE()
88 *dst += sizeof(value); in Write1BE()
91 inline void Write2BE(uint8_t** dst, uint16_t value) { in Write2BE() argument
92 Set2BE(*dst, value); in Write2BE()
93 *dst += sizeof(value); in Write2BE()
96 inline void Write4BE(uint8_t** dst, uint32_t value) { in Write4BE() argument
97 Set4BE(*dst, value); in Write4BE()
98 *dst += sizeof(value); in Write4BE()
101 inline void Write8BE(uint8_t** dst, uint64_t value) { in Write8BE() argument
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Dstrlcpy.h31 static inline size_t strlcpy(char* dst, const char* src, size_t size) { in strlcpy() argument
33 return snprintf(dst, size, "%s", src); in strlcpy()
Dsafe_copy.cc33 ssize_t SafeCopy(void *dst, const void *src, size_t len) { in SafeCopy() argument
36 .iov_base = dst, in SafeCopy()
78 UNUSED(dst, src, len); in SafeCopy()
Dsafe_copy_test.cc95 char* dst = static_cast<char*>(dst_map); in TEST() local
96 ASSERT_EQ(0, mprotect(dst + 3 * kPageSize, kPageSize, PROT_NONE)); in TEST()
102 SafeCopy(dst + 1024, src + 512, kPageSize * 3 - 1024)); in TEST()
103 EXPECT_EQ(0, memcmp(dst + 1024, src + 512, kPageSize * 3 - 1024)); in TEST()
/art/libelffile/elf/
Dxz_utils.cc45 void XzCompress(ArrayRef<const uint8_t> src, std::vector<uint8_t>* dst, int level) { in XzCompress() argument
85 callbacks.dst_ = dst; in XzCompress()
93 XzDecompress(ArrayRef<const uint8_t>(*dst), &decompressed); in XzCompress()
99 void XzDecompress(ArrayRef<const uint8_t> src, std::vector<uint8_t>* dst) { in XzDecompress() argument
111 dst->resize(RoundUp(dst_offset + kPageSize / 4, kPageSize)); in XzDecompress()
113 size_t dst_remaining = dst->size() - dst_offset; in XzDecompress()
115 dst->data() + dst_offset, in XzDecompress()
129 dst->resize(dst_offset); in XzDecompress()
Dxz_utils.h26 void XzCompress(ArrayRef<const uint8_t> src, std::vector<uint8_t>* dst, int level = 1 /* speed */);
27 void XzDecompress(ArrayRef<const uint8_t> src, std::vector<uint8_t>* dst);
/art/test/201-built-in-except-detail-messages/src/
DMain.java136 Integer[] dst = new Integer[10]; in arrayStore() local
137 System.arraycopy(src, 1, dst, 0, 5); in arrayStore()
145 int[] dst = new int[1]; in arrayStore() local
146 System.arraycopy(src, 0, dst, 0, 1); in arrayStore()
153 Runnable[] dst = new Runnable[1]; in arrayStore() local
154 System.arraycopy(src, 0, dst, 0, 1); in arrayStore()
161 double[][] dst = new double[1][]; in arrayStore() local
162 System.arraycopy(src, 0, dst, 0, 1); in arrayStore()
169 Object[] dst = new Object[1]; in arrayStore() local
170 System.arraycopy(src, 0, dst, 0, 1); in arrayStore()
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/art/test/020-string/src/
DMain.java131 char[] dst = new char[7]; in copyTest() local
142 src.getChars(-1, 9, dst, 0); in copyTest()
149 src.getChars(2, 19, dst, 0); in copyTest()
156 src.getChars(2, 1, dst, 0); in copyTest()
163 src.getChars(2, 10, dst, 0); in copyTest()
169 src.getChars(2, 9, dst, 0); in copyTest()
170 System.out.println(new String(dst)); in copyTest()
/art/test/646-checker-arraycopy-large-cst-pos/src/
DMain.java30 Object[] dst = new Object[2048]; in test() local
34 System.arraycopy(src, 0, dst, 1024, 64); in test()
/art/libdexfile/dex/
Dbase64_test_util.h92 std::unique_ptr<uint8_t[]> dst(new uint8_t[tmp.size()]); in DecodeBase64()
94 std::copy(tmp.begin(), tmp.end(), dst.get()); in DecodeBase64()
95 return dst.release(); in DecodeBase64()
/art/test/536-checker-intrinsic-optimization/src/
DMain.java450 char[] dst = new char[src.length()]; in stringGetCharsAndBack() local
451 src.getChars(0, src.length(), dst, 0); in stringGetCharsAndBack()
452 return new String(dst); in stringGetCharsAndBack()
456 char[] dst = new char[src.length() + offset]; in stringGetCharsAndBackOffset() local
457 src.getChars(0, src.length(), dst, offset); in stringGetCharsAndBackOffset()
458 return new String(dst, offset, src.length()); in stringGetCharsAndBackOffset()
462 char[] dst = new char[srcEnd - srcBegin + offset]; in stringGetCharsRange() local
463 src.getChars(srcBegin, srcEnd, dst, offset); in stringGetCharsRange()
464 return new String(dst, offset, srcEnd - srcBegin); in stringGetCharsRange()
/art/libartbase/base/unix_file/
Drandom_access_file_utils.cc25 bool CopyFile(const RandomAccessFile& src, RandomAccessFile* dst) { in CopyFile() argument
32 if (dst->Write(&buf[0], n, offset) != n) { in CopyFile()
/art/tools/ahat/src/main/com/android/ahat/dominators/
DDominators.java256 public final Node dst; field in Dominators.Link
259 public Link(NodeS srcS, Node dst) { in Link() argument
261 this.dst = dst; in Link()
268 this.dst = null; in Link()
314 if (link.dst == null) { in computeDominators()
320 NodeS dstS = (NodeS)graph.getDominatorsComputationState(link.dst); in computeDominators()
325 graph.setDominatorsComputationState(link.dst, dstS); in computeDominators()
327 dstS.node = link.dst; in computeDominators()
336 for (Node child : graph.getReferencesForDominators(link.dst)) { in computeDominators()
/art/tools/
Dbuildbot-build.sh155 dst="$ANDROID_PRODUCT_OUT/system/${l}/${so}"
156 if [ "${src}" -nt "${dst}" ]; then
157 cmd="cp -p \"${src}\" \"${dst}\""
/art/compiler/utils/arm64/
Djni_macro_assembler_arm64.cc300 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRef() local
301 CHECK(dst.IsXRegister()) << dst; in LoadRef()
302 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), SP, offs.Int32Value()); in LoadRef()
309 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRef() local
311 CHECK(dst.IsXRegister() && base.IsXRegister()); in LoadRef()
312 LoadWFromOffset(kLoadWord, dst.AsOverlappingWRegister(), base.AsXRegister(), in LoadRef()
315 WRegister ref_reg = dst.AsOverlappingWRegister(); in LoadRef()
323 Arm64ManagedRegister dst = m_dst.AsArm64(); in LoadRawPtr() local
325 CHECK(dst.IsXRegister() && base.IsXRegister()); in LoadRawPtr()
328 temps.Exclude(reg_x(dst.AsXRegister()), reg_x(base.AsXRegister())); in LoadRawPtr()
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/art/compiler/utils/arm/
Djni_macro_assembler_arm_vixl.cc391 ArmManagedRegister dst = mdst.AsArm(); in Move() local
393 if (!dst.Equals(src)) { in Move()
394 if (dst.IsCoreRegister()) { in Move()
397 temps.Exclude(AsVIXLRegister(dst)); in Move()
398 ___ Mov(AsVIXLRegister(dst), AsVIXLRegister(src)); in Move()
399 } else if (dst.IsDRegister()) { in Move()
401 ___ Vmov(F64, AsVIXLDRegister(dst), AsVIXLDRegister(src)); in Move()
405 ___ Vmov(AsVIXLDRegister(dst), AsVIXLRegisterPairLow(src), AsVIXLRegisterPairHigh(src)); in Move()
407 } else if (dst.IsSRegister()) { in Move()
409 ___ Vmov(F32, AsVIXLSRegister(dst), AsVIXLSRegister(src)); in Move()
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