1 /* Copyright (c) 2009-2012, 2014-2016, 2018, The Linux Foundation. 2 * All rights reserved. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 and 6 * only version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 */ 14 #ifndef __UAPI_MSM_CAMERA_H 15 #define __UAPI_MSM_CAMERA_H 16 17 #define CAM_API_V1 18 19 #include <linux/videodev2.h> 20 #include <linux/types.h> 21 #include <linux/ioctl.h> 22 #include <linux/media.h> 23 24 #include <linux/msm_ion.h> 25 26 #define BIT(nr) (1UL << (nr)) 27 28 #define MSM_CAM_IOCTL_MAGIC 'm' 29 30 #define MAX_SERVER_PAYLOAD_LENGTH 8192 31 32 #define MSM_CAM_IOCTL_GET_SENSOR_INFO \ 33 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *) 34 35 #define MSM_CAM_IOCTL_REGISTER_PMEM \ 36 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *) 37 38 #define MSM_CAM_IOCTL_UNREGISTER_PMEM \ 39 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned int) 40 41 #define MSM_CAM_IOCTL_CTRL_COMMAND \ 42 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *) 43 44 #define MSM_CAM_IOCTL_CONFIG_VFE \ 45 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *) 46 47 #define MSM_CAM_IOCTL_GET_STATS \ 48 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *) 49 50 #define MSM_CAM_IOCTL_GETFRAME \ 51 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *) 52 53 #define MSM_CAM_IOCTL_ENABLE_VFE \ 54 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *) 55 56 #define MSM_CAM_IOCTL_CTRL_CMD_DONE \ 57 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *) 58 59 #define MSM_CAM_IOCTL_CONFIG_CMD \ 60 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *) 61 62 #define MSM_CAM_IOCTL_DISABLE_VFE \ 63 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *) 64 65 #define MSM_CAM_IOCTL_PAD_REG_RESET2 \ 66 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *) 67 68 #define MSM_CAM_IOCTL_VFE_APPS_RESET \ 69 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *) 70 71 #define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \ 72 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *) 73 74 #define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \ 75 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *) 76 77 #define MSM_CAM_IOCTL_AXI_CONFIG \ 78 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *) 79 80 #define MSM_CAM_IOCTL_GET_PICTURE \ 81 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *) 82 83 #define MSM_CAM_IOCTL_SET_CROP \ 84 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *) 85 86 #define MSM_CAM_IOCTL_PICT_PP \ 87 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *) 88 89 #define MSM_CAM_IOCTL_PICT_PP_DONE \ 90 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *) 91 92 #define MSM_CAM_IOCTL_SENSOR_IO_CFG \ 93 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *) 94 95 #define MSM_CAM_IOCTL_FLASH_LED_CFG \ 96 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned int *) 97 98 #define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \ 99 _IO(MSM_CAM_IOCTL_MAGIC, 23) 100 101 #define MSM_CAM_IOCTL_CTRL_COMMAND_2 \ 102 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *) 103 104 #define MSM_CAM_IOCTL_AF_CTRL \ 105 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *) 106 107 #define MSM_CAM_IOCTL_AF_CTRL_DONE \ 108 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *) 109 110 #define MSM_CAM_IOCTL_CONFIG_VPE \ 111 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *) 112 113 #define MSM_CAM_IOCTL_AXI_VPE_CONFIG \ 114 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *) 115 116 #define MSM_CAM_IOCTL_STROBE_FLASH_CFG \ 117 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *) 118 119 #define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \ 120 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *) 121 122 #define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \ 123 _IO(MSM_CAM_IOCTL_MAGIC, 31) 124 125 #define MSM_CAM_IOCTL_FLASH_CTRL \ 126 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *) 127 128 #define MSM_CAM_IOCTL_ERROR_CONFIG \ 129 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *) 130 131 #define MSM_CAM_IOCTL_ABORT_CAPTURE \ 132 _IO(MSM_CAM_IOCTL_MAGIC, 34) 133 134 #define MSM_CAM_IOCTL_SET_FD_ROI \ 135 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *) 136 137 #define MSM_CAM_IOCTL_GET_CAMERA_INFO \ 138 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *) 139 140 #define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \ 141 _IO(MSM_CAM_IOCTL_MAGIC, 37) 142 143 #define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \ 144 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *) 145 146 #define MSM_CAM_IOCTL_PUT_ST_FRAME \ 147 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *) 148 149 #define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \ 150 _IOW(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event_and_payload) 151 152 #define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \ 153 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *) 154 155 #define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \ 156 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *) 157 158 #define MSM_CAM_IOCTL_MCTL_POST_PROC \ 159 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *) 160 161 #define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \ 162 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *) 163 164 #define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \ 165 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *) 166 167 #define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \ 168 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *) 169 170 #define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \ 171 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control) 172 173 #define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \ 174 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl) 175 176 #define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \ 177 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *) 178 179 #define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \ 180 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *) 181 182 #define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \ 183 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *) 184 185 #define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \ 186 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *) 187 188 #define MSM_CAM_IOCTL_EEPROM_IO_CFG \ 189 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *) 190 191 #define MSM_CAM_IOCTL_ISPIF_IO_CFG \ 192 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *) 193 194 #define MSM_CAM_IOCTL_STATS_REQBUF \ 195 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *) 196 197 #define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \ 198 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *) 199 200 #define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \ 201 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *) 202 203 #define MSM_CAM_IOCTL_SET_MCTL_SDEV \ 204 _IOW(MSM_CAM_IOCTL_MAGIC, 58, struct msm_mctl_set_sdev_data *) 205 206 #define MSM_CAM_IOCTL_UNSET_MCTL_SDEV \ 207 _IOW(MSM_CAM_IOCTL_MAGIC, 59, struct msm_mctl_set_sdev_data *) 208 209 #define MSM_CAM_IOCTL_GET_INST_HANDLE \ 210 _IOR(MSM_CAM_IOCTL_MAGIC, 60, uint32_t *) 211 212 #define MSM_CAM_IOCTL_STATS_UNREG_BUF \ 213 _IOR(MSM_CAM_IOCTL_MAGIC, 61, struct msm_stats_flush_bufq *) 214 215 #define MSM_CAM_IOCTL_CSIC_IO_CFG \ 216 _IOWR(MSM_CAM_IOCTL_MAGIC, 62, struct csic_cfg_data *) 217 218 #define MSM_CAM_IOCTL_CSID_IO_CFG \ 219 _IOWR(MSM_CAM_IOCTL_MAGIC, 63, struct csid_cfg_data *) 220 221 #define MSM_CAM_IOCTL_CSIPHY_IO_CFG \ 222 _IOR(MSM_CAM_IOCTL_MAGIC, 64, struct csiphy_cfg_data *) 223 224 #define MSM_CAM_IOCTL_OEM \ 225 _IOW(MSM_CAM_IOCTL_MAGIC, 65, struct sensor_cfg_data *) 226 227 #define MSM_CAM_IOCTL_AXI_INIT \ 228 _IOWR(MSM_CAM_IOCTL_MAGIC, 66, uint8_t *) 229 230 #define MSM_CAM_IOCTL_AXI_RELEASE \ 231 _IO(MSM_CAM_IOCTL_MAGIC, 67) 232 233 struct v4l2_event_and_payload { 234 struct v4l2_event evt; 235 uint32_t payload_length; 236 uint32_t transaction_id; 237 void *payload; 238 }; 239 240 struct msm_stats_reqbuf { 241 int num_buf; /* how many buffers requested */ 242 int stats_type; /* stats type */ 243 }; 244 245 struct msm_stats_flush_bufq { 246 int stats_type; /* enum msm_stats_enum_type */ 247 }; 248 249 struct msm_mctl_pp_cmd { 250 int32_t id; 251 uint16_t length; 252 void *value; 253 }; 254 255 struct msm_mctl_post_proc_cmd { 256 int32_t type; 257 struct msm_mctl_pp_cmd cmd; 258 }; 259 260 #define MSM_CAMERA_LED_OFF 0 261 #define MSM_CAMERA_LED_LOW 1 262 #define MSM_CAMERA_LED_HIGH 2 263 #define MSM_CAMERA_LED_INIT 3 264 #define MSM_CAMERA_LED_RELEASE 4 265 266 #define MSM_CAMERA_STROBE_FLASH_NONE 0 267 #define MSM_CAMERA_STROBE_FLASH_XENON 1 268 269 #define MSM_MAX_CAMERA_SENSORS 5 270 #define MAX_SENSOR_NAME 32 271 #define MAX_CAM_NAME_SIZE 32 272 #define MAX_ACT_MOD_NAME_SIZE 32 273 #define MAX_ACT_NAME_SIZE 32 274 #define NUM_ACTUATOR_DIR 2 275 #define MAX_ACTUATOR_SCENARIO 8 276 #define MAX_ACTUATOR_REGION 5 277 #define MAX_ACTUATOR_INIT_SET 12 278 #define MAX_ACTUATOR_TYPE_SIZE 32 279 #define MAX_ACTUATOR_REG_TBL_SIZE 8 280 281 282 #define MSM_MAX_CAMERA_CONFIGS 2 283 284 #define PP_SNAP 0x01 285 #define PP_RAW_SNAP ((0x01)<<1) 286 #define PP_PREV ((0x01)<<2) 287 #define PP_THUMB ((0x01)<<3) 288 #define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB) 289 290 #define MSM_CAM_CTRL_CMD_DONE 0 291 #define MSM_CAM_SENSOR_VFE_CMD 1 292 293 /* Should be same as VIDEO_MAX_PLANES in videodev2.h */ 294 #define MAX_PLANES 8 295 296 /***************************************************** 297 * structure 298 *****************************************************/ 299 300 /* define five type of structures for userspace <==> kernel 301 * space communication: 302 * command 1 - 2 are from userspace ==> kernel 303 * command 3 - 4 are from kernel ==> userspace 304 * 305 * 1. control command: control command(from control thread), 306 * control status (from config thread); 307 */ 308 struct msm_ctrl_cmd { 309 uint16_t type; 310 uint16_t length; 311 void *value; 312 uint16_t status; 313 uint32_t timeout_ms; 314 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */ 315 int vnode_id; /* video dev id. Can we overload resp_fd? */ 316 int queue_idx; 317 uint32_t evt_id; 318 uint32_t stream_type; /* used to pass value to qcamera server */ 319 int config_ident; /*used as identifier for config node*/ 320 }; 321 322 struct msm_cam_evt_msg { 323 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */ 324 unsigned short msg_id; 325 unsigned int len; /* size in, number of bytes out */ 326 uint32_t frame_id; 327 void *data; 328 struct timespec timestamp; 329 }; 330 331 struct msm_pp_frame_sp { 332 /* phy addr of the buffer */ 333 unsigned long phy_addr; 334 uint32_t y_off; 335 uint32_t cbcr_off; 336 /* buffer length */ 337 uint32_t length; 338 int32_t fd; 339 uint32_t addr_offset; 340 /* mapped addr */ 341 unsigned long vaddr; 342 }; 343 344 struct msm_pp_frame_mp { 345 /* phy addr of the plane */ 346 unsigned long phy_addr; 347 /* offset of plane data */ 348 uint32_t data_offset; 349 /* plane length */ 350 uint32_t length; 351 int32_t fd; 352 uint32_t addr_offset; 353 /* mapped addr */ 354 unsigned long vaddr; 355 }; 356 357 struct msm_pp_frame { 358 uint32_t handle; /* stores vb cookie */ 359 uint32_t frame_id; 360 unsigned short buf_idx; 361 int path; 362 unsigned short image_type; 363 unsigned short num_planes; /* 1 for sp */ 364 struct timeval timestamp; 365 union { 366 struct msm_pp_frame_sp sp; 367 struct msm_pp_frame_mp mp[MAX_PLANES]; 368 }; 369 int node_type; 370 uint32_t inst_handle; 371 }; 372 373 struct msm_pp_crop { 374 uint32_t src_x; 375 uint32_t src_y; 376 uint32_t src_w; 377 uint32_t src_h; 378 uint32_t dst_x; 379 uint32_t dst_y; 380 uint32_t dst_w; 381 uint32_t dst_h; 382 uint8_t update_flag; 383 }; 384 385 struct msm_mctl_pp_frame_cmd { 386 uint32_t cookie; 387 uint8_t vpe_output_action; 388 struct msm_pp_frame src_frame; 389 struct msm_pp_frame dest_frame; 390 struct msm_pp_crop crop; 391 int path; 392 }; 393 394 struct msm_cam_evt_divert_frame { 395 unsigned short image_mode; 396 unsigned short op_mode; 397 unsigned short inst_idx; 398 unsigned short node_idx; 399 struct msm_pp_frame frame; 400 int do_pp; 401 }; 402 403 struct msm_mctl_pp_cmd_ack_event { 404 uint32_t cmd; /* VPE_CMD_ZOOM? */ 405 int status; /* 0 done, < 0 err */ 406 uint32_t cookie; /* daemon's cookie */ 407 }; 408 409 struct msm_mctl_pp_event_info { 410 int32_t event; 411 union { 412 struct msm_mctl_pp_cmd_ack_event ack; 413 }; 414 }; 415 416 struct msm_isp_event_ctrl { 417 unsigned short resptype; 418 union { 419 struct msm_cam_evt_msg isp_msg; 420 struct msm_ctrl_cmd ctrl; 421 struct msm_cam_evt_divert_frame div_frame; 422 struct msm_mctl_pp_event_info pp_event_info; 423 } isp_data; 424 }; 425 426 #define MSM_CAM_RESP_CTRL 0 427 #define MSM_CAM_RESP_STAT_EVT_MSG 1 428 #define MSM_CAM_RESP_STEREO_OP_1 2 429 #define MSM_CAM_RESP_STEREO_OP_2 3 430 #define MSM_CAM_RESP_V4L2 4 431 #define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5 432 #define MSM_CAM_RESP_DONE_EVENT 6 433 #define MSM_CAM_RESP_MCTL_PP_EVENT 7 434 #define MSM_CAM_RESP_MAX 8 435 436 #define MSM_CAM_APP_NOTIFY_EVENT 0 437 #define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1 438 439 /* this one is used to send ctrl/status up to config thread */ 440 441 struct msm_stats_event_ctrl { 442 /* 0 - ctrl_cmd from control thread, 443 * 1 - stats/event kernel, 444 * 2 - V4L control or read request 445 */ 446 int resptype; 447 int timeout_ms; 448 struct msm_ctrl_cmd ctrl_cmd; 449 /* struct vfe_event_t stats_event; */ 450 struct msm_cam_evt_msg stats_event; 451 }; 452 453 /* 2. config command: config command(from config thread); */ 454 struct msm_camera_cfg_cmd { 455 /* what to config: 456 * 1 - sensor config, 2 - vfe config 457 */ 458 uint16_t cfg_type; 459 460 /* sensor config type */ 461 uint16_t cmd_type; 462 uint16_t queue; 463 uint16_t length; 464 void *value; 465 }; 466 467 #define CMD_GENERAL 0 468 #define CMD_AXI_CFG_OUT1 1 469 #define CMD_AXI_CFG_SNAP_O1_AND_O2 2 470 #define CMD_AXI_CFG_OUT2 3 471 #define CMD_PICT_T_AXI_CFG 4 472 #define CMD_PICT_M_AXI_CFG 5 473 #define CMD_RAW_PICT_AXI_CFG 6 474 475 #define CMD_FRAME_BUF_RELEASE 7 476 #define CMD_PREV_BUF_CFG 8 477 #define CMD_SNAP_BUF_RELEASE 9 478 #define CMD_SNAP_BUF_CFG 10 479 #define CMD_STATS_DISABLE 11 480 #define CMD_STATS_AEC_AWB_ENABLE 12 481 #define CMD_STATS_AF_ENABLE 13 482 #define CMD_STATS_AEC_ENABLE 14 483 #define CMD_STATS_AWB_ENABLE 15 484 #define CMD_STATS_ENABLE 16 485 486 #define CMD_STATS_AXI_CFG 17 487 #define CMD_STATS_AEC_AXI_CFG 18 488 #define CMD_STATS_AF_AXI_CFG 19 489 #define CMD_STATS_AWB_AXI_CFG 20 490 #define CMD_STATS_RS_AXI_CFG 21 491 #define CMD_STATS_CS_AXI_CFG 22 492 #define CMD_STATS_IHIST_AXI_CFG 23 493 #define CMD_STATS_SKIN_AXI_CFG 24 494 495 #define CMD_STATS_BUF_RELEASE 25 496 #define CMD_STATS_AEC_BUF_RELEASE 26 497 #define CMD_STATS_AF_BUF_RELEASE 27 498 #define CMD_STATS_AWB_BUF_RELEASE 28 499 #define CMD_STATS_RS_BUF_RELEASE 29 500 #define CMD_STATS_CS_BUF_RELEASE 30 501 #define CMD_STATS_IHIST_BUF_RELEASE 31 502 #define CMD_STATS_SKIN_BUF_RELEASE 32 503 504 #define UPDATE_STATS_INVALID 33 505 #define CMD_AXI_CFG_SNAP_GEMINI 34 506 #define CMD_AXI_CFG_SNAP 35 507 #define CMD_AXI_CFG_PREVIEW 36 508 #define CMD_AXI_CFG_VIDEO 37 509 510 #define CMD_STATS_IHIST_ENABLE 38 511 #define CMD_STATS_RS_ENABLE 39 512 #define CMD_STATS_CS_ENABLE 40 513 #define CMD_VPE 41 514 #define CMD_AXI_CFG_VPE 42 515 #define CMD_AXI_CFG_ZSL 43 516 #define CMD_AXI_CFG_SNAP_VPE 44 517 #define CMD_AXI_CFG_SNAP_THUMB_VPE 45 518 519 #define CMD_CONFIG_PING_ADDR 46 520 #define CMD_CONFIG_PONG_ADDR 47 521 #define CMD_CONFIG_FREE_BUF_ADDR 48 522 #define CMD_AXI_CFG_ZSL_ALL_CHNLS 49 523 #define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50 524 #define CMD_VFE_BUFFER_RELEASE 51 525 #define CMD_VFE_PROCESS_IRQ 52 526 #define CMD_STATS_BG_ENABLE 53 527 #define CMD_STATS_BF_ENABLE 54 528 #define CMD_STATS_BHIST_ENABLE 55 529 #define CMD_STATS_BG_BUF_RELEASE 56 530 #define CMD_STATS_BF_BUF_RELEASE 57 531 #define CMD_STATS_BHIST_BUF_RELEASE 58 532 #define CMD_VFE_PIX_SOF_COUNT_UPDATE 59 533 #define CMD_VFE_COUNT_PIX_SOF_ENABLE 60 534 #define CMD_STATS_BE_ENABLE 61 535 #define CMD_STATS_BE_BUF_RELEASE 62 536 537 #define CMD_AXI_CFG_PRIM BIT(8) 538 #define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9) 539 #define CMD_AXI_CFG_SEC BIT(10) 540 #define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11) 541 #define CMD_AXI_CFG_TERT1 BIT(12) 542 #define CMD_AXI_CFG_TERT2 BIT(13) 543 544 #define CMD_AXI_START 0xE1 545 #define CMD_AXI_STOP 0xE2 546 #define CMD_AXI_RESET 0xE3 547 #define CMD_AXI_ABORT 0xE4 548 549 550 551 #define AXI_CMD_PREVIEW BIT(0) 552 #define AXI_CMD_CAPTURE BIT(1) 553 #define AXI_CMD_RECORD BIT(2) 554 #define AXI_CMD_ZSL BIT(3) 555 #define AXI_CMD_RAW_CAPTURE BIT(4) 556 #define AXI_CMD_LIVESHOT BIT(5) 557 558 /* vfe config command: config command(from config thread)*/ 559 struct msm_vfe_cfg_cmd { 560 int cmd_type; 561 uint16_t length; 562 void *value; 563 }; 564 565 struct msm_vpe_cfg_cmd { 566 int cmd_type; 567 uint16_t length; 568 void *value; 569 }; 570 571 #define MAX_CAMERA_ENABLE_NAME_LEN 32 572 struct camera_enable_cmd { 573 char name[MAX_CAMERA_ENABLE_NAME_LEN]; 574 }; 575 576 #define MSM_PMEM_OUTPUT1 0 577 #define MSM_PMEM_OUTPUT2 1 578 #define MSM_PMEM_OUTPUT1_OUTPUT2 2 579 #define MSM_PMEM_THUMBNAIL 3 580 #define MSM_PMEM_MAINIMG 4 581 #define MSM_PMEM_RAW_MAINIMG 5 582 #define MSM_PMEM_AEC_AWB 6 583 #define MSM_PMEM_AF 7 584 #define MSM_PMEM_AEC 8 585 #define MSM_PMEM_AWB 9 586 #define MSM_PMEM_RS 10 587 #define MSM_PMEM_CS 11 588 #define MSM_PMEM_IHIST 12 589 #define MSM_PMEM_SKIN 13 590 #define MSM_PMEM_VIDEO 14 591 #define MSM_PMEM_PREVIEW 15 592 #define MSM_PMEM_VIDEO_VPE 16 593 #define MSM_PMEM_C2D 17 594 #define MSM_PMEM_MAINIMG_VPE 18 595 #define MSM_PMEM_THUMBNAIL_VPE 19 596 #define MSM_PMEM_BAYER_GRID 20 597 #define MSM_PMEM_BAYER_FOCUS 21 598 #define MSM_PMEM_BAYER_HIST 22 599 #define MSM_PMEM_BAYER_EXPOSURE 23 600 #define MSM_PMEM_MAX 24 601 602 #define STAT_AEAW 0 603 #define STAT_AEC 1 604 #define STAT_AF 2 605 #define STAT_AWB 3 606 #define STAT_RS 4 607 #define STAT_CS 5 608 #define STAT_IHIST 6 609 #define STAT_SKIN 7 610 #define STAT_BG 8 611 #define STAT_BF 9 612 #define STAT_BE 10 613 #define STAT_BHIST 11 614 #define STAT_MAX 12 615 616 #define FRAME_PREVIEW_OUTPUT1 0 617 #define FRAME_PREVIEW_OUTPUT2 1 618 #define FRAME_SNAPSHOT 2 619 #define FRAME_THUMBNAIL 3 620 #define FRAME_RAW_SNAPSHOT 4 621 #define FRAME_MAX 5 622 623 enum msm_stats_enum_type { 624 MSM_STATS_TYPE_AEC, /* legacy based AEC */ 625 MSM_STATS_TYPE_AF, /* legacy based AF */ 626 MSM_STATS_TYPE_AWB, /* legacy based AWB */ 627 MSM_STATS_TYPE_RS, /* legacy based RS */ 628 MSM_STATS_TYPE_CS, /* legacy based CS */ 629 MSM_STATS_TYPE_IHIST, /* legacy based HIST */ 630 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */ 631 MSM_STATS_TYPE_BG, /* Bayer Grids */ 632 MSM_STATS_TYPE_BF, /* Bayer Focus */ 633 MSM_STATS_TYPE_BE, /* Bayer Exposure*/ 634 MSM_STATS_TYPE_BHIST, /* Bayer Hist */ 635 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/ 636 MSM_STATS_TYPE_COMP, /* Composite stats */ 637 MSM_STATS_TYPE_MAX /* MAX */ 638 }; 639 640 struct msm_stats_buf_info { 641 int type; /* msm_stats_enum_type */ 642 int fd; 643 void *vaddr; 644 uint32_t offset; 645 uint32_t len; 646 uint32_t y_off; 647 uint32_t cbcr_off; 648 uint32_t planar0_off; 649 uint32_t planar1_off; 650 uint32_t planar2_off; 651 uint8_t active; 652 int buf_idx; 653 }; 654 655 struct msm_pmem_info { 656 int type; 657 int fd; 658 void *vaddr; 659 uint32_t offset; 660 uint32_t len; 661 uint32_t y_off; 662 uint32_t cbcr_off; 663 uint32_t planar0_off; 664 uint32_t planar1_off; 665 uint32_t planar2_off; 666 uint8_t active; 667 }; 668 669 struct outputCfg { 670 uint32_t height; 671 uint32_t width; 672 673 uint32_t window_height_firstline; 674 uint32_t window_height_lastline; 675 }; 676 677 #define VIDEO_NODE 0 678 #define MCTL_NODE 1 679 680 #define OUTPUT_1 0 681 #define OUTPUT_2 1 682 #define OUTPUT_1_AND_2 2 /* snapshot only */ 683 #define OUTPUT_1_AND_3 3 /* video */ 684 #define CAMIF_TO_AXI_VIA_OUTPUT_2 4 685 #define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5 686 #define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6 687 #define OUTPUT_1_2_AND_3 7 688 #define OUTPUT_ALL_CHNLS 8 689 #define OUTPUT_VIDEO_ALL_CHNLS 9 690 #define OUTPUT_ZSL_ALL_CHNLS 10 691 #define LAST_AXI_OUTPUT_MODE_ENUM OUTPUT_ZSL_ALL_CHNLS 692 693 #define OUTPUT_PRIM BIT(8) 694 #define OUTPUT_PRIM_ALL_CHNLS BIT(9) 695 #define OUTPUT_SEC BIT(10) 696 #define OUTPUT_SEC_ALL_CHNLS BIT(11) 697 #define OUTPUT_TERT1 BIT(12) 698 #define OUTPUT_TERT2 BIT(13) 699 700 701 702 #define MSM_FRAME_PREV_1 0 703 #define MSM_FRAME_PREV_2 1 704 #define MSM_FRAME_ENC 2 705 706 #define OUTPUT_TYPE_P BIT(0) 707 #define OUTPUT_TYPE_T BIT(1) 708 #define OUTPUT_TYPE_S BIT(2) 709 #define OUTPUT_TYPE_V BIT(3) 710 #define OUTPUT_TYPE_L BIT(4) 711 #define OUTPUT_TYPE_ST_L BIT(5) 712 #define OUTPUT_TYPE_ST_R BIT(6) 713 #define OUTPUT_TYPE_ST_D BIT(7) 714 #define OUTPUT_TYPE_R BIT(8) 715 #define OUTPUT_TYPE_R1 BIT(9) 716 #define OUTPUT_TYPE_SAEC BIT(10) 717 #define OUTPUT_TYPE_SAFC BIT(11) 718 #define OUTPUT_TYPE_SAWB BIT(12) 719 #define OUTPUT_TYPE_IHST BIT(13) 720 #define OUTPUT_TYPE_CSTA BIT(14) 721 722 struct fd_roi_info { 723 void *info; 724 int info_len; 725 }; 726 727 struct msm_mem_map_info { 728 uint32_t cookie; 729 uint32_t length; 730 uint32_t mem_type; 731 }; 732 733 #define MSM_MEM_MMAP 0 734 #define MSM_MEM_USERPTR 1 735 #define MSM_PLANE_MAX 8 736 #define MSM_PLANE_Y 0 737 #define MSM_PLANE_UV 1 738 739 struct msm_frame { 740 struct timespec ts; 741 int path; 742 int type; 743 unsigned long buffer; 744 uint32_t phy_offset; 745 uint32_t y_off; 746 uint32_t cbcr_off; 747 uint32_t planar0_off; 748 uint32_t planar1_off; 749 uint32_t planar2_off; 750 int fd; 751 752 void *cropinfo; 753 int croplen; 754 uint32_t error_code; 755 struct fd_roi_info roi_info; 756 uint32_t frame_id; 757 int stcam_quality_ind; 758 uint32_t stcam_conv_value; 759 760 struct ion_allocation_data ion_alloc; 761 struct ion_fd_data fd_data; 762 int ion_dev_fd; 763 }; 764 765 enum msm_st_frame_packing { 766 SIDE_BY_SIDE_HALF, 767 SIDE_BY_SIDE_FULL, 768 TOP_DOWN_HALF, 769 TOP_DOWN_FULL, 770 }; 771 772 struct msm_st_crop { 773 uint32_t in_w; 774 uint32_t in_h; 775 uint32_t out_w; 776 uint32_t out_h; 777 }; 778 779 struct msm_st_half { 780 uint32_t buf_p0_off; 781 uint32_t buf_p1_off; 782 uint32_t buf_p0_stride; 783 uint32_t buf_p1_stride; 784 uint32_t pix_x_off; 785 uint32_t pix_y_off; 786 struct msm_st_crop stCropInfo; 787 }; 788 789 struct msm_st_frame { 790 struct msm_frame buf_info; 791 int type; 792 enum msm_st_frame_packing packing; 793 struct msm_st_half L; 794 struct msm_st_half R; 795 int frame_id; 796 }; 797 798 #define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1) 799 800 struct stats_buff { 801 unsigned long buff; 802 int fd; 803 }; 804 805 struct msm_stats_buf { 806 uint8_t awb_ymin; 807 struct stats_buff aec; 808 struct stats_buff awb; 809 struct stats_buff af; 810 struct stats_buff be; 811 struct stats_buff ihist; 812 struct stats_buff rs; 813 struct stats_buff cs; 814 struct stats_buff skin; 815 int type; 816 uint32_t status_bits; 817 unsigned long buffer; 818 int fd; 819 int length; 820 struct ion_handle *handle; 821 uint32_t frame_id; 822 int buf_idx; 823 }; 824 #define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0 825 /* video capture mode in VIDIOC_S_PARM */ 826 #define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \ 827 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1) 828 /* extendedmode for video recording in VIDIOC_S_PARM */ 829 #define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \ 830 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2) 831 /* extendedmode for the full size main image in VIDIOC_S_PARM */ 832 #define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3) 833 /* extendedmode for the thumb nail image in VIDIOC_S_PARM */ 834 #define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \ 835 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4) 836 /* ISP_PIX_OUTPUT1: no pp, directly send output1 buf to user */ 837 #define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT1 \ 838 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5) 839 /* ISP_PIX_OUTPUT2: no pp, directly send output2 buf to user */ 840 #define MSM_V4L2_EXT_CAPTURE_MODE_ISP_PIX_OUTPUT2 \ 841 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6) 842 /* raw image type */ 843 #define MSM_V4L2_EXT_CAPTURE_MODE_RAW \ 844 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7) 845 /* RDI dump */ 846 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI \ 847 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8) 848 /* RDI dump 1 */ 849 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \ 850 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9) 851 /* RDI dump 2 */ 852 #define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \ 853 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+10) 854 #define MSM_V4L2_EXT_CAPTURE_MODE_AEC \ 855 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+11) 856 #define MSM_V4L2_EXT_CAPTURE_MODE_AWB \ 857 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+12) 858 #define MSM_V4L2_EXT_CAPTURE_MODE_AF \ 859 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+13) 860 #define MSM_V4L2_EXT_CAPTURE_MODE_IHIST \ 861 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+14) 862 #define MSM_V4L2_EXT_CAPTURE_MODE_CS \ 863 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+15) 864 #define MSM_V4L2_EXT_CAPTURE_MODE_RS \ 865 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+16) 866 #define MSM_V4L2_EXT_CAPTURE_MODE_CSTA \ 867 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+17) 868 #define MSM_V4L2_EXT_CAPTURE_MODE_V2X_LIVESHOT \ 869 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+18) 870 #define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+19) 871 872 873 #define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE 874 #define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1) 875 #define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2) 876 #define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3) 877 #define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4) 878 #define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5) 879 #define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6) 880 #define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7) 881 #define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8) 882 #define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9) 883 #define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10) 884 #define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11) 885 #define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12) 886 #define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13) 887 #define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14) 888 #define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15) 889 #define MSM_V4L2_PID_INST_HANDLE (V4L2_CID_PRIVATE_BASE+16) 890 #define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17) 891 #define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18) 892 #define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO 893 894 /* camera operation mode for video recording - two frame output queues */ 895 #define MSM_V4L2_CAM_OP_DEFAULT 0 896 /* camera operation mode for video recording - two frame output queues */ 897 #define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1) 898 /* camera operation mode for video recording - two frame output queues */ 899 #define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2) 900 /* camera operation mode for standard shapshot - two frame output queues */ 901 #define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3) 902 /* camera operation mode for zsl shapshot - three output queues */ 903 #define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4) 904 /* camera operation mode for raw snapshot - one frame output queue */ 905 #define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5) 906 /* camera operation mode for jpeg snapshot - one frame output queue */ 907 #define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6) 908 909 910 #define MSM_V4L2_VID_CAP_TYPE 0 911 #define MSM_V4L2_STREAM_ON 1 912 #define MSM_V4L2_STREAM_OFF 2 913 #define MSM_V4L2_SNAPSHOT 3 914 #define MSM_V4L2_QUERY_CTRL 4 915 #define MSM_V4L2_GET_CTRL 5 916 #define MSM_V4L2_SET_CTRL 6 917 #define MSM_V4L2_QUERY 7 918 #define MSM_V4L2_GET_CROP 8 919 #define MSM_V4L2_SET_CROP 9 920 #define MSM_V4L2_OPEN 10 921 #define MSM_V4L2_CLOSE 11 922 #define MSM_V4L2_SET_CTRL_CMD 12 923 #define MSM_V4L2_EVT_SUB_MASK 13 924 #define MSM_V4L2_PRIVATE_CMD 14 925 #define MSM_V4L2_MAX 15 926 #define V4L2_CAMERA_EXIT 43 927 928 struct crop_info { 929 void *info; 930 int len; 931 }; 932 933 struct msm_postproc { 934 int ftnum; 935 struct msm_frame fthumnail; 936 int fmnum; 937 struct msm_frame fmain; 938 }; 939 940 struct msm_snapshot_pp_status { 941 void *status; 942 }; 943 944 #define CFG_SET_MODE 0 945 #define CFG_SET_EFFECT 1 946 #define CFG_START 2 947 #define CFG_PWR_UP 3 948 #define CFG_PWR_DOWN 4 949 #define CFG_WRITE_EXPOSURE_GAIN 5 950 #define CFG_SET_DEFAULT_FOCUS 6 951 #define CFG_MOVE_FOCUS 7 952 #define CFG_REGISTER_TO_REAL_GAIN 8 953 #define CFG_REAL_TO_REGISTER_GAIN 9 954 #define CFG_SET_FPS 10 955 #define CFG_SET_PICT_FPS 11 956 #define CFG_SET_BRIGHTNESS 12 957 #define CFG_SET_CONTRAST 13 958 #define CFG_SET_ZOOM 14 959 #define CFG_SET_EXPOSURE_MODE 15 960 #define CFG_SET_WB 16 961 #define CFG_SET_ANTIBANDING 17 962 #define CFG_SET_EXP_GAIN 18 963 #define CFG_SET_PICT_EXP_GAIN 19 964 #define CFG_SET_LENS_SHADING 20 965 #define CFG_GET_PICT_FPS 21 966 #define CFG_GET_PREV_L_PF 22 967 #define CFG_GET_PREV_P_PL 23 968 #define CFG_GET_PICT_L_PF 24 969 #define CFG_GET_PICT_P_PL 25 970 #define CFG_GET_AF_MAX_STEPS 26 971 #define CFG_GET_PICT_MAX_EXP_LC 27 972 #define CFG_SEND_WB_INFO 28 973 #define CFG_SENSOR_INIT 29 974 #define CFG_GET_3D_CALI_DATA 30 975 #define CFG_GET_CALIB_DATA 31 976 #define CFG_GET_OUTPUT_INFO 32 977 #define CFG_GET_EEPROM_INFO 33 978 #define CFG_GET_EEPROM_DATA 34 979 #define CFG_SET_ACTUATOR_INFO 35 980 #define CFG_GET_ACTUATOR_INFO 36 981 /* TBD: QRD */ 982 #define CFG_SET_SATURATION 37 983 #define CFG_SET_SHARPNESS 38 984 #define CFG_SET_TOUCHAEC 39 985 #define CFG_SET_AUTO_FOCUS 40 986 #define CFG_SET_AUTOFLASH 41 987 #define CFG_SET_EXPOSURE_COMPENSATION 42 988 #define CFG_SET_ISO 43 989 #define CFG_START_STREAM 44 990 #define CFG_STOP_STREAM 45 991 #define CFG_GET_CSI_PARAMS 46 992 #define CFG_POWER_UP 47 993 #define CFG_POWER_DOWN 48 994 #define CFG_WRITE_I2C_ARRAY 49 995 #define CFG_READ_I2C_ARRAY 50 996 #define CFG_PCLK_CHANGE 51 997 #define CFG_CONFIG_VREG_ARRAY 52 998 #define CFG_CONFIG_CLK_ARRAY 53 999 #define CFG_GPIO_OP 54 1000 #define CFG_MAX 55 1001 1002 1003 #define MOVE_NEAR 0 1004 #define MOVE_FAR 1 1005 1006 #define SENSOR_PREVIEW_MODE 0 1007 #define SENSOR_SNAPSHOT_MODE 1 1008 #define SENSOR_RAW_SNAPSHOT_MODE 2 1009 #define SENSOR_HFR_60FPS_MODE 3 1010 #define SENSOR_HFR_90FPS_MODE 4 1011 #define SENSOR_HFR_120FPS_MODE 5 1012 1013 #define SENSOR_QTR_SIZE 0 1014 #define SENSOR_FULL_SIZE 1 1015 #define SENSOR_QVGA_SIZE 2 1016 #define SENSOR_INVALID_SIZE 3 1017 1018 #define CAMERA_EFFECT_OFF 0 1019 #define CAMERA_EFFECT_MONO 1 1020 #define CAMERA_EFFECT_NEGATIVE 2 1021 #define CAMERA_EFFECT_SOLARIZE 3 1022 #define CAMERA_EFFECT_SEPIA 4 1023 #define CAMERA_EFFECT_POSTERIZE 5 1024 #define CAMERA_EFFECT_WHITEBOARD 6 1025 #define CAMERA_EFFECT_BLACKBOARD 7 1026 #define CAMERA_EFFECT_AQUA 8 1027 #define CAMERA_EFFECT_EMBOSS 9 1028 #define CAMERA_EFFECT_SKETCH 10 1029 #define CAMERA_EFFECT_NEON 11 1030 #define CAMERA_EFFECT_FADED 12 1031 #define CAMERA_EFFECT_VINTAGECOOL 13 1032 #define CAMERA_EFFECT_VINTAGEWARM 14 1033 #define CAMERA_EFFECT_ACCENT_BLUE 15 1034 #define CAMERA_EFFECT_ACCENT_GREEN 16 1035 #define CAMERA_EFFECT_ACCENT_ORANGE 17 1036 #define CAMERA_EFFECT_MAX 18 1037 1038 /* QRD */ 1039 #define CAMERA_EFFECT_BW 10 1040 #define CAMERA_EFFECT_BLUISH 12 1041 #define CAMERA_EFFECT_REDDISH 13 1042 #define CAMERA_EFFECT_GREENISH 14 1043 1044 /* QRD */ 1045 #define CAMERA_ANTIBANDING_OFF 0 1046 #define CAMERA_ANTIBANDING_50HZ 2 1047 #define CAMERA_ANTIBANDING_60HZ 1 1048 #define CAMERA_ANTIBANDING_AUTO 3 1049 1050 #define CAMERA_CONTRAST_LV0 0 1051 #define CAMERA_CONTRAST_LV1 1 1052 #define CAMERA_CONTRAST_LV2 2 1053 #define CAMERA_CONTRAST_LV3 3 1054 #define CAMERA_CONTRAST_LV4 4 1055 #define CAMERA_CONTRAST_LV5 5 1056 #define CAMERA_CONTRAST_LV6 6 1057 #define CAMERA_CONTRAST_LV7 7 1058 #define CAMERA_CONTRAST_LV8 8 1059 #define CAMERA_CONTRAST_LV9 9 1060 1061 #define CAMERA_BRIGHTNESS_LV0 0 1062 #define CAMERA_BRIGHTNESS_LV1 1 1063 #define CAMERA_BRIGHTNESS_LV2 2 1064 #define CAMERA_BRIGHTNESS_LV3 3 1065 #define CAMERA_BRIGHTNESS_LV4 4 1066 #define CAMERA_BRIGHTNESS_LV5 5 1067 #define CAMERA_BRIGHTNESS_LV6 6 1068 #define CAMERA_BRIGHTNESS_LV7 7 1069 #define CAMERA_BRIGHTNESS_LV8 8 1070 1071 1072 #define CAMERA_SATURATION_LV0 0 1073 #define CAMERA_SATURATION_LV1 1 1074 #define CAMERA_SATURATION_LV2 2 1075 #define CAMERA_SATURATION_LV3 3 1076 #define CAMERA_SATURATION_LV4 4 1077 #define CAMERA_SATURATION_LV5 5 1078 #define CAMERA_SATURATION_LV6 6 1079 #define CAMERA_SATURATION_LV7 7 1080 #define CAMERA_SATURATION_LV8 8 1081 1082 #define CAMERA_SHARPNESS_LV0 0 1083 #define CAMERA_SHARPNESS_LV1 3 1084 #define CAMERA_SHARPNESS_LV2 6 1085 #define CAMERA_SHARPNESS_LV3 9 1086 #define CAMERA_SHARPNESS_LV4 12 1087 #define CAMERA_SHARPNESS_LV5 15 1088 #define CAMERA_SHARPNESS_LV6 18 1089 #define CAMERA_SHARPNESS_LV7 21 1090 #define CAMERA_SHARPNESS_LV8 24 1091 #define CAMERA_SHARPNESS_LV9 27 1092 #define CAMERA_SHARPNESS_LV10 30 1093 1094 #define CAMERA_SETAE_AVERAGE 0 1095 #define CAMERA_SETAE_CENWEIGHT 1 1096 1097 #define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */ 1098 #define CAMERA_WB_CUSTOM 2 1099 #define CAMERA_WB_INCANDESCENT 3 1100 #define CAMERA_WB_FLUORESCENT 4 1101 #define CAMERA_WB_DAYLIGHT 5 1102 #define CAMERA_WB_CLOUDY_DAYLIGHT 6 1103 #define CAMERA_WB_TWILIGHT 7 1104 #define CAMERA_WB_SHADE 8 1105 1106 #define CAMERA_EXPOSURE_COMPENSATION_LV0 12 1107 #define CAMERA_EXPOSURE_COMPENSATION_LV1 6 1108 #define CAMERA_EXPOSURE_COMPENSATION_LV2 0 1109 #define CAMERA_EXPOSURE_COMPENSATION_LV3 -6 1110 #define CAMERA_EXPOSURE_COMPENSATION_LV4 -12 1111 1112 enum msm_v4l2_saturation_level { 1113 MSM_V4L2_SATURATION_L0, 1114 MSM_V4L2_SATURATION_L1, 1115 MSM_V4L2_SATURATION_L2, 1116 MSM_V4L2_SATURATION_L3, 1117 MSM_V4L2_SATURATION_L4, 1118 MSM_V4L2_SATURATION_L5, 1119 MSM_V4L2_SATURATION_L6, 1120 MSM_V4L2_SATURATION_L7, 1121 MSM_V4L2_SATURATION_L8, 1122 MSM_V4L2_SATURATION_L9, 1123 MSM_V4L2_SATURATION_L10, 1124 }; 1125 1126 enum msm_v4l2_contrast_level { 1127 MSM_V4L2_CONTRAST_L0, 1128 MSM_V4L2_CONTRAST_L1, 1129 MSM_V4L2_CONTRAST_L2, 1130 MSM_V4L2_CONTRAST_L3, 1131 MSM_V4L2_CONTRAST_L4, 1132 MSM_V4L2_CONTRAST_L5, 1133 MSM_V4L2_CONTRAST_L6, 1134 MSM_V4L2_CONTRAST_L7, 1135 MSM_V4L2_CONTRAST_L8, 1136 MSM_V4L2_CONTRAST_L9, 1137 MSM_V4L2_CONTRAST_L10, 1138 }; 1139 1140 1141 enum msm_v4l2_exposure_level { 1142 MSM_V4L2_EXPOSURE_N2, 1143 MSM_V4L2_EXPOSURE_N1, 1144 MSM_V4L2_EXPOSURE_D, 1145 MSM_V4L2_EXPOSURE_P1, 1146 MSM_V4L2_EXPOSURE_P2, 1147 }; 1148 1149 enum msm_v4l2_sharpness_level { 1150 MSM_V4L2_SHARPNESS_L0, 1151 MSM_V4L2_SHARPNESS_L1, 1152 MSM_V4L2_SHARPNESS_L2, 1153 MSM_V4L2_SHARPNESS_L3, 1154 MSM_V4L2_SHARPNESS_L4, 1155 MSM_V4L2_SHARPNESS_L5, 1156 MSM_V4L2_SHARPNESS_L6, 1157 }; 1158 1159 enum msm_v4l2_expo_metering_mode { 1160 MSM_V4L2_EXP_FRAME_AVERAGE, 1161 MSM_V4L2_EXP_CENTER_WEIGHTED, 1162 MSM_V4L2_EXP_SPOT_METERING, 1163 }; 1164 1165 enum msm_v4l2_iso_mode { 1166 MSM_V4L2_ISO_AUTO = 0, 1167 MSM_V4L2_ISO_DEBLUR, 1168 MSM_V4L2_ISO_100, 1169 MSM_V4L2_ISO_200, 1170 MSM_V4L2_ISO_400, 1171 MSM_V4L2_ISO_800, 1172 MSM_V4L2_ISO_1600, 1173 }; 1174 1175 enum msm_v4l2_wb_mode { 1176 MSM_V4L2_WB_OFF, 1177 MSM_V4L2_WB_AUTO, 1178 MSM_V4L2_WB_CUSTOM, 1179 MSM_V4L2_WB_INCANDESCENT, 1180 MSM_V4L2_WB_FLUORESCENT, 1181 MSM_V4L2_WB_DAYLIGHT, 1182 MSM_V4L2_WB_CLOUDY_DAYLIGHT, 1183 }; 1184 1185 enum msm_v4l2_special_effect { 1186 MSM_V4L2_EFFECT_OFF, 1187 MSM_V4L2_EFFECT_MONO, 1188 MSM_V4L2_EFFECT_NEGATIVE, 1189 MSM_V4L2_EFFECT_SOLARIZE, 1190 MSM_V4L2_EFFECT_SEPIA, 1191 MSM_V4L2_EFFECT_POSTERAIZE, 1192 MSM_V4L2_EFFECT_WHITEBOARD, 1193 MSM_V4L2_EFFECT_BLACKBOARD, 1194 MSM_V4L2_EFFECT_AQUA, 1195 MSM_V4L2_EFFECT_EMBOSS, 1196 MSM_V4L2_EFFECT_SKETCH, 1197 MSM_V4L2_EFFECT_NEON, 1198 MSM_V4L2_EFFECT_MAX, 1199 }; 1200 1201 enum msm_v4l2_power_line_frequency { 1202 MSM_V4L2_POWER_LINE_OFF, 1203 MSM_V4L2_POWER_LINE_60HZ, 1204 MSM_V4L2_POWER_LINE_50HZ, 1205 MSM_V4L2_POWER_LINE_AUTO, 1206 }; 1207 1208 #define CAMERA_ISO_TYPE_AUTO 0 1209 #define CAMEAR_ISO_TYPE_HJR 1 1210 #define CAMEAR_ISO_TYPE_100 2 1211 #define CAMERA_ISO_TYPE_200 3 1212 #define CAMERA_ISO_TYPE_400 4 1213 #define CAMEAR_ISO_TYPE_800 5 1214 #define CAMERA_ISO_TYPE_1600 6 1215 1216 struct sensor_pict_fps { 1217 uint16_t prevfps; 1218 uint16_t pictfps; 1219 }; 1220 1221 struct exp_gain_cfg { 1222 uint16_t gain; 1223 uint32_t line; 1224 }; 1225 1226 struct focus_cfg { 1227 int32_t steps; 1228 int dir; 1229 }; 1230 1231 struct fps_cfg { 1232 uint16_t f_mult; 1233 uint16_t fps_div; 1234 uint32_t pict_fps_div; 1235 }; 1236 struct wb_info_cfg { 1237 uint16_t red_gain; 1238 uint16_t green_gain; 1239 uint16_t blue_gain; 1240 }; 1241 struct sensor_3d_exp_cfg { 1242 uint16_t gain; 1243 uint32_t line; 1244 uint16_t r_gain; 1245 uint16_t b_gain; 1246 uint16_t gr_gain; 1247 uint16_t gb_gain; 1248 uint16_t gain_adjust; 1249 }; 1250 struct sensor_3d_cali_data_t { 1251 unsigned char left_p_matrix[3][4][8]; 1252 unsigned char right_p_matrix[3][4][8]; 1253 unsigned char square_len[8]; 1254 unsigned char focal_len[8]; 1255 unsigned char pixel_pitch[8]; 1256 uint16_t left_r; 1257 uint16_t left_b; 1258 uint16_t left_gb; 1259 uint16_t left_af_far; 1260 uint16_t left_af_mid; 1261 uint16_t left_af_short; 1262 uint16_t left_af_5um; 1263 uint16_t left_af_50up; 1264 uint16_t left_af_50down; 1265 uint16_t right_r; 1266 uint16_t right_b; 1267 uint16_t right_gb; 1268 uint16_t right_af_far; 1269 uint16_t right_af_mid; 1270 uint16_t right_af_short; 1271 uint16_t right_af_5um; 1272 uint16_t right_af_50up; 1273 uint16_t right_af_50down; 1274 }; 1275 struct sensor_init_cfg { 1276 uint8_t prev_res; 1277 uint8_t pict_res; 1278 }; 1279 1280 struct sensor_calib_data { 1281 /* Color Related Measurements */ 1282 uint16_t r_over_g; 1283 uint16_t b_over_g; 1284 uint16_t gr_over_gb; 1285 1286 /* Lens Related Measurements */ 1287 uint16_t macro_2_inf; 1288 uint16_t inf_2_macro; 1289 uint16_t stroke_amt; 1290 uint16_t af_pos_1m; 1291 uint16_t af_pos_inf; 1292 }; 1293 1294 enum msm_sensor_resolution_t { 1295 MSM_SENSOR_RES_FULL, 1296 MSM_SENSOR_RES_QTR, 1297 MSM_SENSOR_RES_2, 1298 MSM_SENSOR_RES_3, 1299 MSM_SENSOR_RES_4, 1300 MSM_SENSOR_RES_5, 1301 MSM_SENSOR_RES_6, 1302 MSM_SENSOR_RES_7, 1303 MSM_SENSOR_INVALID_RES, 1304 }; 1305 1306 struct msm_sensor_output_info_t { 1307 uint16_t x_output; 1308 uint16_t y_output; 1309 uint16_t line_length_pclk; 1310 uint16_t frame_length_lines; 1311 uint32_t vt_pixel_clk; 1312 uint32_t op_pixel_clk; 1313 uint16_t binning_factor; 1314 }; 1315 1316 struct sensor_output_info_t { 1317 struct msm_sensor_output_info_t *output_info; 1318 uint16_t num_info; 1319 }; 1320 1321 struct msm_sensor_exp_gain_info_t { 1322 uint16_t coarse_int_time_addr; 1323 uint16_t global_gain_addr; 1324 uint16_t vert_offset; 1325 }; 1326 1327 struct msm_sensor_output_reg_addr_t { 1328 uint16_t x_output; 1329 uint16_t y_output; 1330 uint16_t line_length_pclk; 1331 uint16_t frame_length_lines; 1332 }; 1333 1334 struct sensor_driver_params_type { 1335 struct msm_camera_i2c_reg_setting *init_settings; 1336 uint16_t init_settings_size; 1337 struct msm_camera_i2c_reg_setting *mode_settings; 1338 uint16_t mode_settings_size; 1339 struct msm_sensor_output_reg_addr_t *sensor_output_reg_addr; 1340 struct msm_camera_i2c_reg_setting *start_settings; 1341 struct msm_camera_i2c_reg_setting *stop_settings; 1342 struct msm_camera_i2c_reg_setting *groupon_settings; 1343 struct msm_camera_i2c_reg_setting *groupoff_settings; 1344 struct msm_sensor_exp_gain_info_t *sensor_exp_gain_info; 1345 struct msm_sensor_output_info_t *output_info; 1346 }; 1347 1348 struct mirror_flip { 1349 int32_t x_mirror; 1350 int32_t y_flip; 1351 }; 1352 1353 struct cord { 1354 uint32_t x; 1355 uint32_t y; 1356 }; 1357 1358 struct msm_eeprom_data_t { 1359 void *eeprom_data; 1360 uint16_t index; 1361 }; 1362 1363 struct msm_camera_csid_vc_cfg { 1364 uint8_t cid; 1365 uint8_t dt; 1366 uint8_t decode_format; 1367 }; 1368 1369 struct csi_lane_params_t { 1370 uint16_t csi_lane_assign; 1371 uint8_t csi_lane_mask; 1372 uint8_t csi_if; 1373 uint8_t csid_core[2]; 1374 uint8_t csi_phy_sel; 1375 }; 1376 1377 struct msm_camera_csid_lut_params { 1378 uint8_t num_cid; 1379 struct msm_camera_csid_vc_cfg *vc_cfg; 1380 }; 1381 1382 struct msm_camera_csid_params { 1383 uint8_t lane_cnt; 1384 uint16_t lane_assign; 1385 uint8_t phy_sel; 1386 struct msm_camera_csid_lut_params lut_params; 1387 }; 1388 1389 struct msm_camera_csiphy_params { 1390 uint8_t lane_cnt; 1391 uint8_t settle_cnt; 1392 uint16_t lane_mask; 1393 uint8_t combo_mode; 1394 uint8_t csid_core; 1395 uint64_t data_rate; 1396 }; 1397 1398 struct msm_camera_csi2_params { 1399 struct msm_camera_csid_params csid_params; 1400 struct msm_camera_csiphy_params csiphy_params; 1401 }; 1402 1403 enum msm_camera_csi_data_format { 1404 CSI_8BIT, 1405 CSI_10BIT, 1406 CSI_12BIT, 1407 }; 1408 1409 struct msm_camera_csi_params { 1410 enum msm_camera_csi_data_format data_format; 1411 uint8_t lane_cnt; 1412 uint8_t lane_assign; 1413 uint8_t settle_cnt; 1414 uint8_t dpcm_scheme; 1415 }; 1416 1417 enum csic_cfg_type_t { 1418 CSIC_INIT, 1419 CSIC_CFG, 1420 }; 1421 1422 struct csic_cfg_data { 1423 enum csic_cfg_type_t cfgtype; 1424 struct msm_camera_csi_params *csic_params; 1425 }; 1426 1427 enum csid_cfg_type_t { 1428 CSID_INIT, 1429 CSID_CFG, 1430 }; 1431 1432 struct csid_cfg_data { 1433 enum csid_cfg_type_t cfgtype; 1434 union { 1435 uint32_t csid_version; 1436 struct msm_camera_csid_params *csid_params; 1437 } cfg; 1438 }; 1439 1440 enum csiphy_cfg_type_t { 1441 CSIPHY_INIT, 1442 CSIPHY_CFG, 1443 }; 1444 1445 struct csiphy_cfg_data { 1446 enum csiphy_cfg_type_t cfgtype; 1447 struct msm_camera_csiphy_params *csiphy_params; 1448 }; 1449 1450 #define CSI_EMBED_DATA 0x12 1451 #define CSI_RESERVED_DATA_0 0x13 1452 #define CSI_YUV422_8 0x1E 1453 #define CSI_RAW8 0x2A 1454 #define CSI_RAW10 0x2B 1455 #define CSI_RAW12 0x2C 1456 1457 #define CSI_DECODE_6BIT 0 1458 #define CSI_DECODE_8BIT 1 1459 #define CSI_DECODE_10BIT 2 1460 #define CSI_DECODE_DPCM_10_8_10 5 1461 1462 #define ISPIF_STREAM(intf, action, vfe) (((intf)<<ISPIF_S_STREAM_SHIFT)+\ 1463 (action)+((vfe)<<ISPIF_VFE_INTF_SHIFT)) 1464 #define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0) 1465 #define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1) 1466 #define ISPIF_OFF_IMMEDIATELY (0x01 << 2) 1467 #define ISPIF_S_STREAM_SHIFT 4 1468 #define ISPIF_VFE_INTF_SHIFT 12 1469 1470 #define PIX_0 (0x01 << 0) 1471 #define RDI_0 (0x01 << 1) 1472 #define PIX_1 (0x01 << 2) 1473 #define RDI_1 (0x01 << 3) 1474 #define RDI_2 (0x01 << 4) 1475 1476 enum msm_ispif_vfe_intf { 1477 VFE0, 1478 VFE1, 1479 VFE_MAX, 1480 }; 1481 1482 enum msm_ispif_intftype { 1483 PIX0, 1484 RDI0, 1485 PIX1, 1486 RDI1, 1487 RDI2, 1488 INTF_MAX, 1489 }; 1490 1491 enum msm_ispif_vc { 1492 VC0, 1493 VC1, 1494 VC2, 1495 VC3, 1496 }; 1497 1498 enum msm_ispif_cid { 1499 CID0, 1500 CID1, 1501 CID2, 1502 CID3, 1503 CID4, 1504 CID5, 1505 CID6, 1506 CID7, 1507 CID8, 1508 CID9, 1509 CID10, 1510 CID11, 1511 CID12, 1512 CID13, 1513 CID14, 1514 CID15, 1515 }; 1516 1517 struct msm_ispif_params { 1518 uint8_t intftype; 1519 uint16_t cid_mask; 1520 uint8_t csid; 1521 uint8_t vfe_intf; 1522 }; 1523 1524 struct msm_ispif_params_list { 1525 uint32_t len; 1526 struct msm_ispif_params params[4]; 1527 }; 1528 1529 enum ispif_cfg_type_t { 1530 ISPIF_INIT, 1531 ISPIF_SET_CFG, 1532 ISPIF_SET_ON_FRAME_BOUNDARY, 1533 ISPIF_SET_OFF_FRAME_BOUNDARY, 1534 ISPIF_SET_OFF_IMMEDIATELY, 1535 ISPIF_RELEASE, 1536 }; 1537 1538 struct ispif_cfg_data { 1539 enum ispif_cfg_type_t cfgtype; 1540 union { 1541 uint32_t csid_version; 1542 int cmd; 1543 struct msm_ispif_params_list ispif_params; 1544 } cfg; 1545 }; 1546 1547 enum msm_camera_i2c_reg_addr_type { 1548 MSM_CAMERA_I2C_BYTE_ADDR = 1, 1549 MSM_CAMERA_I2C_WORD_ADDR, 1550 MSM_CAMERA_I2C_3B_ADDR, 1551 MSM_CAMERA_I2C_DWORD_ADDR, 1552 }; 1553 #define MSM_CAMERA_I2C_DWORD_ADDR MSM_CAMERA_I2C_DWORD_ADDR 1554 1555 struct msm_camera_i2c_reg_array { 1556 uint16_t reg_addr; 1557 uint16_t reg_data; 1558 }; 1559 1560 enum msm_camera_i2c_data_type { 1561 MSM_CAMERA_I2C_BYTE_DATA = 1, 1562 MSM_CAMERA_I2C_WORD_DATA, 1563 MSM_CAMERA_I2C_SET_BYTE_MASK, 1564 MSM_CAMERA_I2C_UNSET_BYTE_MASK, 1565 MSM_CAMERA_I2C_SET_WORD_MASK, 1566 MSM_CAMERA_I2C_UNSET_WORD_MASK, 1567 MSM_CAMERA_I2C_SET_BYTE_WRITE_MASK_DATA, 1568 }; 1569 1570 struct msm_camera_i2c_reg_setting { 1571 struct msm_camera_i2c_reg_array *reg_setting; 1572 uint16_t size; 1573 enum msm_camera_i2c_reg_addr_type addr_type; 1574 enum msm_camera_i2c_data_type data_type; 1575 uint16_t delay; 1576 }; 1577 1578 enum oem_setting_type { 1579 I2C_READ = 1, 1580 I2C_WRITE, 1581 GPIO_OP, 1582 EEPROM_READ, 1583 VREG_SET, 1584 CLK_SET, 1585 }; 1586 1587 struct sensor_oem_setting { 1588 enum oem_setting_type type; 1589 void *data; 1590 }; 1591 1592 enum camera_vreg_type { 1593 REG_LDO, 1594 REG_VS, 1595 REG_GPIO, 1596 }; 1597 1598 enum msm_camera_vreg_name_t { 1599 CAM_VDIG, 1600 CAM_VIO, 1601 CAM_VANA, 1602 CAM_VAF, 1603 CAM_VREG_MAX, 1604 }; 1605 1606 struct msm_camera_csi_lane_params { 1607 uint16_t csi_lane_assign; 1608 uint16_t csi_lane_mask; 1609 }; 1610 1611 struct camera_vreg_t { 1612 const char *reg_name; 1613 int min_voltage; 1614 int max_voltage; 1615 int op_mode; 1616 uint32_t delay; 1617 }; 1618 1619 struct msm_camera_vreg_setting { 1620 struct camera_vreg_t *cam_vreg; 1621 uint16_t num_vreg; 1622 uint8_t enable; 1623 }; 1624 1625 struct msm_cam_clk_info { 1626 const char *clk_name; 1627 long clk_rate; 1628 uint32_t delay; 1629 }; 1630 1631 struct msm_cam_clk_setting { 1632 struct msm_cam_clk_info *clk_info; 1633 uint16_t num_clk_info; 1634 uint8_t enable; 1635 }; 1636 1637 struct sensor_cfg_data { 1638 int cfgtype; 1639 int mode; 1640 int rs; 1641 uint8_t max_steps; 1642 1643 union { 1644 int8_t effect; 1645 uint8_t lens_shading; 1646 uint16_t prevl_pf; 1647 uint16_t prevp_pl; 1648 uint16_t pictl_pf; 1649 uint16_t pictp_pl; 1650 uint32_t pict_max_exp_lc; 1651 uint16_t p_fps; 1652 uint8_t iso_type; 1653 struct sensor_init_cfg init_info; 1654 struct sensor_pict_fps gfps; 1655 struct exp_gain_cfg exp_gain; 1656 struct focus_cfg focus; 1657 struct fps_cfg fps; 1658 struct wb_info_cfg wb_info; 1659 struct sensor_3d_exp_cfg sensor_3d_exp; 1660 struct sensor_calib_data calib_info; 1661 struct sensor_output_info_t output_info; 1662 struct msm_eeprom_data_t eeprom_data; 1663 struct csi_lane_params_t csi_lane_params; 1664 /* QRD */ 1665 uint16_t antibanding; 1666 uint8_t contrast; 1667 uint8_t saturation; 1668 uint8_t sharpness; 1669 int8_t brightness; 1670 int ae_mode; 1671 uint8_t wb_val; 1672 int8_t exp_compensation; 1673 uint32_t pclk; 1674 struct cord aec_cord; 1675 int is_autoflash; 1676 struct mirror_flip mirror_flip; 1677 void *setting; 1678 } cfg; 1679 }; 1680 1681 enum gpio_operation_type { 1682 GPIO_REQUEST, 1683 GPIO_FREE, 1684 GPIO_SET_DIRECTION_OUTPUT, 1685 GPIO_SET_DIRECTION_INPUT, 1686 GPIO_GET_VALUE, 1687 GPIO_SET_VALUE, 1688 }; 1689 1690 struct msm_cam_gpio_operation { 1691 enum gpio_operation_type op_type; 1692 unsigned int address; 1693 int value; 1694 const char *tag; 1695 }; 1696 1697 struct damping_params_t { 1698 uint32_t damping_step; 1699 uint32_t damping_delay; 1700 uint32_t hw_params; 1701 }; 1702 1703 enum actuator_type { 1704 ACTUATOR_VCM, 1705 ACTUATOR_PIEZO, 1706 ACTUATOR_HVCM, 1707 ACTUATOR_BIVCM, 1708 }; 1709 1710 enum msm_actuator_data_type { 1711 MSM_ACTUATOR_BYTE_DATA = 1, 1712 MSM_ACTUATOR_WORD_DATA, 1713 }; 1714 1715 enum msm_actuator_addr_type { 1716 MSM_ACTUATOR_BYTE_ADDR = 1, 1717 MSM_ACTUATOR_WORD_ADDR, 1718 }; 1719 1720 enum msm_actuator_write_type { 1721 MSM_ACTUATOR_WRITE_HW_DAMP, 1722 MSM_ACTUATOR_WRITE_DAC, 1723 MSM_ACTUATOR_WRITE, 1724 MSM_ACTUATOR_WRITE_DIR_REG, 1725 MSM_ACTUATOR_POLL, 1726 MSM_ACTUATOR_READ_WRITE, 1727 }; 1728 1729 struct msm_actuator_reg_params_t { 1730 enum msm_actuator_write_type reg_write_type; 1731 uint32_t hw_mask; 1732 uint16_t reg_addr; 1733 uint16_t hw_shift; 1734 uint16_t data_type; 1735 uint16_t addr_type; 1736 uint16_t reg_data; 1737 uint16_t delay; 1738 }; 1739 1740 struct reg_settings_t { 1741 uint16_t reg_addr; 1742 uint16_t reg_data; 1743 }; 1744 1745 struct region_params_t { 1746 /* [0] = ForwardDirection Macro boundary 1747 * [1] = ReverseDirection Inf boundary 1748 */ 1749 uint16_t step_bound[2]; 1750 uint16_t code_per_step; 1751 }; 1752 1753 struct msm_actuator_move_params_t { 1754 int8_t dir; 1755 int8_t sign_dir; 1756 int16_t dest_step_pos; 1757 int32_t num_steps; 1758 struct damping_params_t *ringing_params; 1759 }; 1760 1761 struct msm_actuator_tuning_params_t { 1762 int16_t initial_code; 1763 uint16_t pwd_step; 1764 uint16_t region_size; 1765 uint32_t total_steps; 1766 struct region_params_t *region_params; 1767 }; 1768 1769 struct msm_actuator_params_t { 1770 enum actuator_type act_type; 1771 uint8_t reg_tbl_size; 1772 uint16_t data_size; 1773 uint16_t init_setting_size; 1774 uint32_t i2c_addr; 1775 enum msm_actuator_addr_type i2c_addr_type; 1776 enum msm_actuator_data_type i2c_data_type; 1777 struct msm_actuator_reg_params_t *reg_tbl_params; 1778 struct reg_settings_t *init_settings; 1779 }; 1780 1781 struct msm_actuator_set_info_t { 1782 struct msm_actuator_params_t actuator_params; 1783 struct msm_actuator_tuning_params_t af_tuning_params; 1784 }; 1785 1786 struct msm_actuator_get_info_t { 1787 uint32_t focal_length_num; 1788 uint32_t focal_length_den; 1789 uint32_t f_number_num; 1790 uint32_t f_number_den; 1791 uint32_t f_pix_num; 1792 uint32_t f_pix_den; 1793 uint32_t total_f_dist_num; 1794 uint32_t total_f_dist_den; 1795 uint32_t hor_view_angle_num; 1796 uint32_t hor_view_angle_den; 1797 uint32_t ver_view_angle_num; 1798 uint32_t ver_view_angle_den; 1799 }; 1800 1801 enum af_camera_name { 1802 ACTUATOR_MAIN_CAM_0, 1803 ACTUATOR_MAIN_CAM_1, 1804 ACTUATOR_MAIN_CAM_2, 1805 ACTUATOR_MAIN_CAM_3, 1806 ACTUATOR_MAIN_CAM_4, 1807 ACTUATOR_MAIN_CAM_5, 1808 ACTUATOR_WEB_CAM_0, 1809 ACTUATOR_WEB_CAM_1, 1810 ACTUATOR_WEB_CAM_2, 1811 }; 1812 1813 struct msm_actuator_cfg_data { 1814 int cfgtype; 1815 uint8_t is_af_supported; 1816 union { 1817 struct msm_actuator_move_params_t move; 1818 struct msm_actuator_set_info_t set_info; 1819 struct msm_actuator_get_info_t get_info; 1820 enum af_camera_name cam_name; 1821 } cfg; 1822 }; 1823 1824 struct msm_eeprom_support { 1825 uint16_t is_supported; 1826 uint16_t size; 1827 uint16_t index; 1828 uint16_t qvalue; 1829 }; 1830 1831 struct msm_calib_wb { 1832 uint16_t r_over_g; 1833 uint16_t b_over_g; 1834 uint16_t gr_over_gb; 1835 }; 1836 1837 struct msm_calib_af { 1838 uint16_t macro_dac; 1839 uint16_t inf_dac; 1840 uint16_t start_dac; 1841 }; 1842 1843 struct msm_calib_lsc { 1844 uint16_t r_gain[221]; 1845 uint16_t b_gain[221]; 1846 uint16_t gr_gain[221]; 1847 uint16_t gb_gain[221]; 1848 }; 1849 1850 struct pixel_t { 1851 int x; 1852 int y; 1853 }; 1854 1855 struct msm_calib_dpc { 1856 uint16_t validcount; 1857 struct pixel_t snapshot_coord[128]; 1858 struct pixel_t preview_coord[128]; 1859 struct pixel_t video_coord[128]; 1860 }; 1861 1862 struct msm_calib_raw { 1863 uint8_t *data; 1864 uint32_t size; 1865 }; 1866 1867 struct msm_camera_eeprom_info_t { 1868 struct msm_eeprom_support af; 1869 struct msm_eeprom_support wb; 1870 struct msm_eeprom_support lsc; 1871 struct msm_eeprom_support dpc; 1872 struct msm_eeprom_support raw; 1873 }; 1874 1875 struct msm_eeprom_cfg_data { 1876 int cfgtype; 1877 uint8_t is_eeprom_supported; 1878 union { 1879 struct msm_eeprom_data_t get_data; 1880 struct msm_camera_eeprom_info_t get_info; 1881 } cfg; 1882 }; 1883 1884 struct sensor_large_data { 1885 int cfgtype; 1886 union { 1887 struct sensor_3d_cali_data_t sensor_3d_cali_data; 1888 } data; 1889 }; 1890 1891 enum sensor_type_t { 1892 BAYER, 1893 YUV, 1894 JPEG_SOC, 1895 }; 1896 1897 enum flash_type { 1898 LED_FLASH, 1899 STROBE_FLASH, 1900 }; 1901 1902 enum strobe_flash_ctrl_type { 1903 STROBE_FLASH_CTRL_INIT, 1904 STROBE_FLASH_CTRL_CHARGE, 1905 STROBE_FLASH_CTRL_RELEASE 1906 }; 1907 1908 struct strobe_flash_ctrl_data { 1909 enum strobe_flash_ctrl_type type; 1910 int charge_en; 1911 }; 1912 1913 struct msm_camera_info { 1914 int num_cameras; 1915 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS]; 1916 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS]; 1917 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS]; 1918 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS]; 1919 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS]; 1920 }; 1921 1922 struct msm_cam_config_dev_info { 1923 int num_config_nodes; 1924 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS]; 1925 int config_dev_id[MSM_MAX_CAMERA_CONFIGS]; 1926 }; 1927 1928 struct msm_mctl_node_info { 1929 int num_mctl_nodes; 1930 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS]; 1931 }; 1932 1933 struct flash_ctrl_data { 1934 int flashtype; 1935 union { 1936 int led_state; 1937 struct strobe_flash_ctrl_data strobe_ctrl; 1938 } ctrl_data; 1939 }; 1940 1941 #define GET_NAME 0 1942 #define GET_PREVIEW_LINE_PER_FRAME 1 1943 #define GET_PREVIEW_PIXELS_PER_LINE 2 1944 #define GET_SNAPSHOT_LINE_PER_FRAME 3 1945 #define GET_SNAPSHOT_PIXELS_PER_LINE 4 1946 #define GET_SNAPSHOT_FPS 5 1947 #define GET_SNAPSHOT_MAX_EP_LINE_CNT 6 1948 1949 struct msm_camsensor_info { 1950 char name[MAX_SENSOR_NAME]; 1951 uint8_t flash_enabled; 1952 uint8_t strobe_flash_enabled; 1953 uint8_t actuator_enabled; 1954 uint8_t ispif_supported; 1955 int8_t total_steps; 1956 uint8_t support_3d; 1957 enum flash_type flashtype; 1958 enum sensor_type_t sensor_type; 1959 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */ 1960 uint32_t camera_type; /* msm_camera_type */ 1961 int mount_angle; 1962 uint32_t max_width; 1963 uint32_t max_height; 1964 }; 1965 1966 #define V4L2_SINGLE_PLANE 0 1967 #define V4L2_MULTI_PLANE_Y 0 1968 #define V4L2_MULTI_PLANE_CBCR 1 1969 #define V4L2_MULTI_PLANE_CB 1 1970 #define V4L2_MULTI_PLANE_CR 2 1971 1972 struct plane_data { 1973 int plane_id; 1974 uint32_t offset; 1975 unsigned long size; 1976 }; 1977 1978 struct img_plane_info { 1979 uint32_t width; 1980 uint32_t height; 1981 uint32_t pixelformat; 1982 uint8_t buffer_type; /*Single/Multi planar*/ 1983 uint8_t output_port; 1984 uint32_t ext_mode; 1985 uint8_t num_planes; 1986 struct plane_data plane[MAX_PLANES]; 1987 uint32_t sp_y_offset; 1988 uint32_t inst_handle; 1989 }; 1990 1991 #define QCAMERA_NAME "qcamera" 1992 #define QCAMERA_SERVER_NAME "qcamera_server" 1993 #define QCAMERA_VNODE_GROUP_ID MEDIA_ENT_F_IO_V4L 1994 1995 enum msm_cam_subdev_type { 1996 CSIPHY_DEV, 1997 CSID_DEV, 1998 CSIC_DEV, 1999 ISPIF_DEV, 2000 VFE_DEV, 2001 AXI_DEV, 2002 VPE_DEV, 2003 SENSOR_DEV, 2004 ACTUATOR_DEV, 2005 EEPROM_DEV, 2006 GESTURE_DEV, 2007 IRQ_ROUTER_DEV, 2008 CPP_DEV, 2009 CCI_DEV, 2010 FLASH_DEV, 2011 }; 2012 2013 struct msm_mctl_set_sdev_data { 2014 uint32_t revision; 2015 enum msm_cam_subdev_type sdev_type; 2016 }; 2017 2018 #define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \ 2019 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) 2020 2021 #define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \ 2022 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) 2023 2024 #define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \ 2025 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t) 2026 2027 #define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \ 2028 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t) 2029 2030 #define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \ 2031 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t) 2032 2033 #define MSM_CAM_IOCTL_SEND_EVENT \ 2034 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event) 2035 2036 #define MSM_CAM_V4L2_IOCTL_CFG_VPE \ 2037 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd) 2038 2039 #define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \ 2040 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t) 2041 2042 #define MSM_CAM_V4L2_IOCTL_PRIVATE_G_CTRL \ 2043 _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_camera_v4l2_ioctl_t) 2044 2045 #define MSM_CAM_V4L2_IOCTL_PRIVATE_GENERAL \ 2046 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct msm_camera_v4l2_ioctl_t) 2047 2048 #define VIDIOC_MSM_VPE_INIT \ 2049 _IO('V', BASE_VIDIOC_PRIVATE + 15) 2050 2051 #define VIDIOC_MSM_VPE_RELEASE \ 2052 _IO('V', BASE_VIDIOC_PRIVATE + 16) 2053 2054 #define VIDIOC_MSM_VPE_CFG \ 2055 _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_mctl_pp_params *) 2056 2057 #define VIDIOC_MSM_AXI_INIT \ 2058 _IOWR('V', BASE_VIDIOC_PRIVATE + 18, uint8_t *) 2059 2060 #define VIDIOC_MSM_AXI_RELEASE \ 2061 _IO('V', BASE_VIDIOC_PRIVATE + 19) 2062 2063 #define VIDIOC_MSM_AXI_CFG \ 2064 _IOWR('V', BASE_VIDIOC_PRIVATE + 20, void *) 2065 2066 #define VIDIOC_MSM_AXI_IRQ \ 2067 _IOWR('V', BASE_VIDIOC_PRIVATE + 21, void *) 2068 2069 #define VIDIOC_MSM_AXI_BUF_CFG \ 2070 _IOWR('V', BASE_VIDIOC_PRIVATE + 22, void *) 2071 2072 #define VIDIOC_MSM_AXI_RDI_COUNT_UPDATE \ 2073 _IOWR('V', BASE_VIDIOC_PRIVATE + 23, void *) 2074 2075 #define VIDIOC_MSM_VFE_INIT \ 2076 _IO('V', BASE_VIDIOC_PRIVATE + 24) 2077 2078 #define VIDIOC_MSM_VFE_RELEASE \ 2079 _IO('V', BASE_VIDIOC_PRIVATE + 25) 2080 2081 struct msm_camera_v4l2_ioctl_t { 2082 uint32_t id; 2083 uint32_t len; 2084 uint32_t trans_code; 2085 void *ioctl_ptr; 2086 }; 2087 2088 struct msm_camera_vfe_params_t { 2089 uint32_t operation_mode; 2090 uint32_t capture_count; 2091 uint8_t skip_reset; 2092 uint8_t stop_immediately; 2093 uint16_t port_info; 2094 uint32_t inst_handle; 2095 uint16_t cmd_type; 2096 }; 2097 2098 enum msm_camss_irq_idx { 2099 CAMERA_SS_IRQ_0, 2100 CAMERA_SS_IRQ_1, 2101 CAMERA_SS_IRQ_2, 2102 CAMERA_SS_IRQ_3, 2103 CAMERA_SS_IRQ_4, 2104 CAMERA_SS_IRQ_5, 2105 CAMERA_SS_IRQ_6, 2106 CAMERA_SS_IRQ_7, 2107 CAMERA_SS_IRQ_8, 2108 CAMERA_SS_IRQ_9, 2109 CAMERA_SS_IRQ_10, 2110 CAMERA_SS_IRQ_11, 2111 CAMERA_SS_IRQ_12, 2112 CAMERA_SS_IRQ_MAX 2113 }; 2114 2115 enum msm_cam_hw_idx { 2116 MSM_CAM_HW_MICRO, 2117 MSM_CAM_HW_CCI, 2118 MSM_CAM_HW_CSI0, 2119 MSM_CAM_HW_CSI1, 2120 MSM_CAM_HW_CSI2, 2121 MSM_CAM_HW_CSI3, 2122 MSM_CAM_HW_ISPIF, 2123 MSM_CAM_HW_CPP, 2124 MSM_CAM_HW_VFE0, 2125 MSM_CAM_HW_VFE1, 2126 MSM_CAM_HW_JPEG0, 2127 MSM_CAM_HW_JPEG1, 2128 MSM_CAM_HW_JPEG2, 2129 MSM_CAM_HW_MAX 2130 }; 2131 2132 struct msm_camera_irq_cfg { 2133 /* Bit mask of all the camera hardwares that needs to 2134 * be composited into a single IRQ to the MSM. 2135 * Current usage: (may be updated based on hw changes) 2136 * Bits 31:13 - Reserved. 2137 * Bits 12:0 2138 * 12 - MSM_CAM_HW_JPEG2 2139 * 11 - MSM_CAM_HW_JPEG1 2140 * 10 - MSM_CAM_HW_JPEG0 2141 * 9 - MSM_CAM_HW_VFE1 2142 * 8 - MSM_CAM_HW_VFE0 2143 * 7 - MSM_CAM_HW_CPP 2144 * 6 - MSM_CAM_HW_ISPIF 2145 * 5 - MSM_CAM_HW_CSI3 2146 * 4 - MSM_CAM_HW_CSI2 2147 * 3 - MSM_CAM_HW_CSI1 2148 * 2 - MSM_CAM_HW_CSI0 2149 * 1 - MSM_CAM_HW_CCI 2150 * 0 - MSM_CAM_HW_MICRO 2151 */ 2152 uint32_t cam_hw_mask; 2153 uint8_t irq_idx; 2154 uint8_t num_hwcore; 2155 }; 2156 2157 #define MSM_IRQROUTER_CFG_COMPIRQ \ 2158 _IOWR('V', BASE_VIDIOC_PRIVATE, void *) 2159 2160 #define MAX_NUM_CPP_STRIPS 8 2161 2162 enum msm_cpp_frame_type { 2163 MSM_CPP_OFFLINE_FRAME, 2164 MSM_CPP_REALTIME_FRAME, 2165 }; 2166 2167 struct msm_cpp_frame_info_t { 2168 int32_t frame_id; 2169 uint32_t inst_id; 2170 uint32_t client_id; 2171 enum msm_cpp_frame_type frame_type; 2172 uint32_t num_strips; 2173 }; 2174 2175 struct msm_ver_num_info { 2176 uint32_t main; 2177 uint32_t minor; 2178 uint32_t rev; 2179 }; 2180 2181 #define VIDIOC_MSM_CPP_CFG \ 2182 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t) 2183 2184 #define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \ 2185 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t) 2186 2187 #define VIDIOC_MSM_CPP_GET_INST_INFO \ 2188 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t) 2189 2190 #define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0) 2191 2192 /* Instance Handle - inst_handle 2193 * Data bundle containing the information about where 2194 * to get a buffer for a particular camera instance. 2195 * This is a bitmask containing the following data: 2196 * Buffer Handle Bitmask: 2197 * ------------------------------------ 2198 * Bits : Purpose 2199 * ------------------------------------ 2200 * 31 : is Dev ID valid? 2201 * 30 - 24 : Dev ID. 2202 * 23 : is Image mode valid? 2203 * 22 - 16 : Image mode. 2204 * 15 : is MCTL PP inst idx valid? 2205 * 14 - 8 : MCTL PP inst idx. 2206 * 7 : is Video inst idx valid? 2207 * 6 - 0 : Video inst idx. 2208 */ 2209 #define CLR_DEVID_MODE(handle) (handle &= 0x00FFFFFF) 2210 #define SET_DEVID_MODE(handle, data) \ 2211 (handle |= ((0x1 << 31) | ((data & 0x7F) << 24))) 2212 #define GET_DEVID_MODE(handle) \ 2213 ((handle & 0x80000000) ? ((handle & 0x7F000000) >> 24) : 0xFF) 2214 2215 #define CLR_IMG_MODE(handle) (handle &= 0xFF00FFFF) 2216 #define SET_IMG_MODE(handle, data) \ 2217 (handle |= ((0x1 << 23) | ((data & 0x7F) << 16))) 2218 #define GET_IMG_MODE(handle) \ 2219 ((handle & 0x800000) ? ((handle & 0x7F0000) >> 16) : 0xFF) 2220 2221 #define CLR_MCTLPP_INST_IDX(handle) (handle &= 0xFFFF00FF) 2222 #define SET_MCTLPP_INST_IDX(handle, data) \ 2223 (handle |= ((0x1 << 15) | ((data & 0x7F) << 8))) 2224 #define GET_MCTLPP_INST_IDX(handle) \ 2225 ((handle & 0x8000) ? ((handle & 0x7F00) >> 8) : 0xFF) 2226 2227 #define CLR_VIDEO_INST_IDX(handle) (handle &= 0xFFFFFF00) 2228 #define GET_VIDEO_INST_IDX(handle) \ 2229 ((handle & 0x80) ? (handle & 0x7F) : 0xFF) 2230 #define SET_VIDEO_INST_IDX(handle, data) \ 2231 (handle |= (0x1 << 7) | (data & 0x7F)) 2232 #endif 2233