1/*
2 * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7#include <arch.h>
8#include <el3_common_macros.S>
9
10	.globl	bl1_entrypoint
11
12
13	/* -----------------------------------------------------
14	 * bl1_entrypoint() is the entry point into the trusted
15	 * firmware code when a cpu is released from warm or
16	 * cold reset.
17	 * -----------------------------------------------------
18	 */
19
20func bl1_entrypoint
21	/* ---------------------------------------------------------------------
22	 * If the reset address is programmable then bl1_entrypoint() is
23	 * executed only on the cold boot path. Therefore, we can skip the warm
24	 * boot mailbox mechanism.
25	 * ---------------------------------------------------------------------
26	 */
27	el3_entrypoint_common					\
28		_init_sctlr=1					\
29		_warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS	\
30		_secondary_cold_boot=!COLD_BOOT_SINGLE_CPU	\
31		_init_memory=1					\
32		_init_c_runtime=1				\
33		_exception_vectors=bl1_exceptions
34
35	/* ---------------------------------------------
36	 * Architectural init. can be generic e.g.
37	 * enabling stack alignment and platform spec-
38	 * ific e.g. MMU & page table setup as per the
39	 * platform memory map. Perform the latter here
40	 * and the former in bl1_main.
41	 * ---------------------------------------------
42	 */
43	bl	bl1_early_platform_setup
44	bl	bl1_plat_arch_setup
45
46	/* --------------------------------------------------
47	 * Initialize platform and jump to our c-entry point
48	 * for this type of reset.
49	 * --------------------------------------------------
50	 */
51	bl	bl1_main
52
53	/* --------------------------------------------------
54	 * Do the transition to next boot image.
55	 * --------------------------------------------------
56	 */
57	b	el3_exit
58endfunc bl1_entrypoint
59