1# 2# Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7JUNO_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 8 drivers/arm/gic/v2/gicv2_main.c \ 9 drivers/arm/gic/v2/gicv2_helpers.c \ 10 plat/common/plat_gicv2.c \ 11 plat/arm/common/arm_gicv2.c 12 13JUNO_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c \ 14 plat/arm/common/arm_cci.c 15 16JUNO_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 17 plat/arm/board/juno/juno_security.c \ 18 plat/arm/board/juno/juno_trng.c \ 19 plat/arm/common/arm_tzc400.c 20 21ifneq (${ENABLE_STACK_PROTECTOR}, 0) 22JUNO_SECURITY_SOURCES += plat/arm/board/juno/juno_stack_protector.c 23endif 24 25PLAT_INCLUDES := -Iplat/arm/board/juno/include 26 27PLAT_BL_COMMON_SOURCES := plat/arm/board/juno/${ARCH}/juno_helpers.S 28 29# Flag to enable support for AArch32 state on JUNO 30JUNO_AARCH32_EL3_RUNTIME := 0 31$(eval $(call assert_boolean,JUNO_AARCH32_EL3_RUNTIME)) 32$(eval $(call add_define,JUNO_AARCH32_EL3_RUNTIME)) 33 34ifeq (${ARCH},aarch64) 35BL1_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 36 lib/cpus/aarch64/cortex_a57.S \ 37 lib/cpus/aarch64/cortex_a72.S \ 38 plat/arm/board/juno/juno_bl1_setup.c \ 39 plat/arm/board/juno/juno_err.c \ 40 ${JUNO_INTERCONNECT_SOURCES} \ 41 ${JUNO_SECURITY_SOURCES} 42 43BL2_SOURCES += plat/arm/board/juno/juno_err.c \ 44 plat/arm/board/juno/juno_bl2_setup.c \ 45 ${JUNO_SECURITY_SOURCES} 46 47BL2U_SOURCES += ${JUNO_SECURITY_SOURCES} 48 49BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 50 lib/cpus/aarch64/cortex_a57.S \ 51 lib/cpus/aarch64/cortex_a72.S \ 52 plat/arm/board/juno/juno_topology.c \ 53 ${JUNO_GIC_SOURCES} \ 54 ${JUNO_INTERCONNECT_SOURCES} \ 55 ${JUNO_SECURITY_SOURCES} 56endif 57 58# Errata workarounds for Cortex-A53: 59ERRATA_A53_826319 := 1 60ERRATA_A53_835769 := 1 61ERRATA_A53_836870 := 1 62ERRATA_A53_843419 := 1 63ERRATA_A53_855873 := 1 64 65# Errata workarounds for Cortex-A57: 66ERRATA_A57_806969 := 0 67ERRATA_A57_813419 := 1 68ERRATA_A57_813420 := 1 69ERRATA_A57_826974 := 1 70ERRATA_A57_826977 := 1 71ERRATA_A57_828024 := 1 72ERRATA_A57_829520 := 1 73ERRATA_A57_833471 := 1 74ERRATA_A57_859972 := 0 75 76# Errata workarounds for Cortex-A72: 77ERRATA_A72_859971 := 0 78 79# Enable option to skip L1 data cache flush during the Cortex-A57 cluster 80# power down sequence 81SKIP_A57_L1_FLUSH_PWR_DWN := 1 82 83# Disable the PSCI platform compatibility layer 84ENABLE_PLAT_COMPAT := 0 85 86# Enable memory map related constants optimisation 87ARM_BOARD_OPTIMISE_MEM := 1 88 89include plat/arm/board/common/board_css.mk 90include plat/arm/common/arm_common.mk 91include plat/arm/soc/common/soc_css.mk 92include plat/arm/css/common/css_common.mk 93 94