1/* 2 * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6#include <arch.h> 7#include <asm_macros.S> 8#include <cpu_macros.S> 9#include <css_def.h> 10 11 .weak plat_secondary_cold_boot_setup 12 .weak plat_get_my_entrypoint 13 .globl css_calc_core_pos_swap_cluster 14 .weak plat_is_my_cpu_primary 15 16 /* --------------------------------------------------------------------- 17 * void plat_secondary_cold_boot_setup(void); 18 * In the normal boot flow, cold-booting secondary 19 * CPUs is not yet implemented and they panic. 20 * --------------------------------------------------------------------- 21 */ 22func plat_secondary_cold_boot_setup 23 /* TODO: Implement secondary CPU cold boot setup on CSS platforms */ 24cb_panic: 25 b cb_panic 26endfunc plat_secondary_cold_boot_setup 27 28 /* --------------------------------------------------------------------- 29 * uintptr_t plat_get_my_entrypoint (void); 30 * 31 * Main job of this routine is to distinguish between a cold and a warm 32 * boot. On CSS platforms, this distinction is based on the contents of 33 * the Trusted Mailbox. It is initialised to zero by the SCP before the 34 * AP cores are released from reset. Therefore, a zero mailbox means 35 * it's a cold reset. 36 * 37 * This functions returns the contents of the mailbox, i.e.: 38 * - 0 for a cold boot; 39 * - the warm boot entrypoint for a warm boot. 40 * --------------------------------------------------------------------- 41 */ 42func plat_get_my_entrypoint 43 ldr r0, =PLAT_ARM_TRUSTED_MAILBOX_BASE 44 ldr r0, [r0] 45 bx lr 46endfunc plat_get_my_entrypoint 47 48 /* ----------------------------------------------------------- 49 * unsigned int css_calc_core_pos_swap_cluster(u_register_t mpidr) 50 * Utility function to calculate the core position by 51 * swapping the cluster order. This is necessary in order to 52 * match the format of the boot information passed by the SCP 53 * and read in plat_is_my_cpu_primary below. 54 * ----------------------------------------------------------- 55 */ 56func css_calc_core_pos_swap_cluster 57 and r1, r0, #MPIDR_CPU_MASK 58 and r0, r0, #MPIDR_CLUSTER_MASK 59 eor r0, r0, #(1 << MPIDR_AFFINITY_BITS) // swap cluster order 60 add r0, r1, r0, LSR #6 61 bx lr 62endfunc css_calc_core_pos_swap_cluster 63 64 /* ----------------------------------------------------- 65 * unsigned int plat_is_my_cpu_primary (void); 66 * 67 * Find out whether the current cpu is the primary 68 * cpu (applicable ony after a cold boot) 69 * ----------------------------------------------------- 70 */ 71#if CSS_USE_SCMI_SDS_DRIVER 72func plat_is_my_cpu_primary 73 mov r10, lr 74 bl plat_my_core_pos 75 mov r4, r0 76 bl sds_get_primary_cpu_id 77 /* Check for error */ 78 mov r1, #0xffffffff 79 cmp r0, r1 80 beq 1f 81 cmp r0, r4 82 moveq r0, #1 83 movne r0, #0 84 bx r10 851: 86 no_ret plat_panic_handler 87endfunc plat_is_my_cpu_primary 88#else 89func plat_is_my_cpu_primary 90 mov r10, lr 91 bl plat_my_core_pos 92 ldr r1, =SCP_BOOT_CFG_ADDR 93 ldr r1, [r1] 94 ubfx r1, r1, #PLAT_CSS_PRIMARY_CPU_SHIFT, \ 95 #PLAT_CSS_PRIMARY_CPU_BIT_WIDTH 96 cmp r0, r1 97 moveq r0, #1 98 movne r0, #0 99 bx r10 100endfunc plat_is_my_cpu_primary 101#endif 102