1 /*
2  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef __POPLAR_LAYOUT_H
8 #define __POPLAR_LAYOUT_H
9 
10 /*
11  * Boot memory layout definitions for the HiSilicon Poplar board
12  */
13 
14 /*
15  * When Poplar is powered on, boot ROM loads the initial content of
16  * boot media into low memory, verifies it, and begins executing it
17  * in 32-bit mode.  The image loaded is "l-loader.bin", which contains
18  * a small amount code along with an embedded ARM Trusted Firmware
19  * BL1 image.  The main purpose of "l-loader" is to prepare the
20  * processor to execute the BL1 image in 64-bit mode, and to trigger
21  * that execution.
22  *
23  * Also embedded in "l-loader.bin" is a FIP image that contains
24  * other ARM Trusted Firmware images:  BL2; BL31; and for BL33,
25  * U-Boot.  When BL1 executes, it unpacks the BL2 image from the FIP
26  * image into a region of memory set aside to hold it.  Similarly,
27  * BL2 unpacks BL31 into memory reserved for it, and unpacks U-Boot
28  * into high memory.
29  *
30  * Because the BL1 code is embedded in "l-loader", its base address
31  * in memory is derived from the base address of the "l-loader"
32  * text section, together with an offset.  Memory space for BL2 is
33  * reserved immediately following BL1, and memory space is reserved
34  * for BL31 after that.  ARM Trusted Firmware requires each of these
35  * memory regions to be aligned on page boundaries, so the size of
36  * each region is a multiple of a page size (ending in 000).  Note
37  * that ARM Trusted Firmware requires the read-only and read-write
38  * regions of memory used for BL1 to be defined separately.
39  *
40  *    ---------------------
41  *    |  (unused memory)  |
42  *    +-------------------+	- - - - -
43  *    |  (l-loader text)  |               \
44  *    +-------------------+                \
45  *    |  BL1 (read-only)  | \               \
46  *    |- - - - - - - - - -| |               |
47  *    |  BL1 (read-write) | |               |
48  *    +-------------------+  >  BL Memory   |
49  *    |  Reserved for BL2 | |                > "l-loader.bin" image
50  *    +-------------------+ |               |
51  *    | Reserved for BL31 | /               |
52  *    +-------------------+                 |
53  *           . . .                          /
54  *    +-------------------+                /
55  *    |        FIP        |               /
56  *    +-------------------+	- - - - -
57  *           . . .
58  *    |  (unused memory)  |
59  *           . . .
60  *    +-------------------+
61  *    |Reserved for U-Boot|
62  *    +-------------------+
63  *           . . .
64  *    |  (unused memory)  |
65  *    ---------------------
66  *
67  * The size of each of these regions is defined below.  The base
68  * address of the "l-loader" TEXT section and the offset of the BL1
69  * image within that serve as anchors for defining the positions of
70  * all other regions.  The FIP is placed in a section of its own.
71  *
72  * A "BASE" is the memory address of the start of a region; a "LIMIT"
73  * marks its end.  A "SIZE" is the size of a region (in bytes).  An
74  * "OFFSET" is an offset to the start of a region relative to the
75  * base of the "l-loader" TEXT section (also a multiple of page size).
76  */
77 #define LLOADER_TEXT_BASE		0x00001000	/* page aligned */
78 #define BL1_OFFSET			0x0000D000	/* page multiple */
79 #define FIP_BASE			0x00040000
80 
81 #define BL1_RO_SIZE			0x00008000	/* page multiple */
82 #define BL1_RW_SIZE			0x00008000	/* page multiple */
83 #define BL1_SIZE			(BL1_RO_SIZE + BL1_RW_SIZE)
84 #define BL2_SIZE			0x0000c000	/* page multiple */
85 #define BL31_SIZE			0x00014000
86 #define FIP_SIZE			0x00068000
87 
88      /* BL1_OFFSET */			/* (Defined above) */
89 #define BL1_BASE			(LLOADER_TEXT_BASE + BL1_OFFSET)
90 #define BL1_LIMIT			(BL1_BASE + BL1_SIZE)
91 
92 #define BL1_RO_OFFSET			(BL1_OFFSET)
93 #define BL1_RO_BASE			(LLOADER_TEXT_BASE + BL1_RO_OFFSET)
94 #define BL1_RO_LIMIT			(BL1_RO_BASE + BL1_RO_SIZE)
95 
96 #define BL1_RW_OFFSET			(BL1_RO_OFFSET + BL1_RO_SIZE)
97 #define BL1_RW_BASE			(LLOADER_TEXT_BASE + BL1_RW_OFFSET)
98 #define BL1_RW_LIMIT			(BL1_RW_BASE + BL1_RW_SIZE)
99 
100 #define BL2_OFFSET			(BL1_OFFSET + BL1_SIZE)
101 #define BL2_BASE			(LLOADER_TEXT_BASE + BL2_OFFSET)
102 #define BL2_LIMIT			(BL2_BASE + BL2_SIZE)
103 
104 #define BL31_OFFSET			(BL2_OFFSET + BL2_SIZE)
105 #define BL31_BASE			(LLOADER_TEXT_BASE + BL31_OFFSET)
106 #define BL31_LIMIT			(BL31_BASE + BL31_SIZE)
107 
108 #endif /* !__POPLAR_LAYOUT_H */
109