1 /*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
7 #include <arch_helpers.h>
8 #include <cci.h>
9 #include <stddef.h>
10 #include <utils_def.h>
11
12 #include "uniphier.h"
13
14 #define UNIPHIER_CCI500_BASE 0x5FD00000
15
16 static const int uniphier_cci_map[] = {0, 1};
17
__uniphier_cci_init(void)18 static void __uniphier_cci_init(void)
19 {
20 cci_init(UNIPHIER_CCI500_BASE, uniphier_cci_map,
21 ARRAY_SIZE(uniphier_cci_map));
22 }
23
__uniphier_cci_enable(void)24 static void __uniphier_cci_enable(void)
25 {
26 cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
27 }
28
__uniphier_cci_disable(void)29 static void __uniphier_cci_disable(void)
30 {
31 cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr_el1()));
32 }
33
34 struct uniphier_cci_ops {
35 void (*init)(void);
36 void (*enable)(void);
37 void (*disable)(void);
38 };
39
40 static const struct uniphier_cci_ops uniphier_cci_ops_table[] = {
41 [UNIPHIER_SOC_LD11] = {
42 .init = NULL,
43 .enable = NULL,
44 .disable = NULL,
45 },
46 [UNIPHIER_SOC_LD20] = {
47 .init = __uniphier_cci_init,
48 .enable = __uniphier_cci_enable,
49 .disable = __uniphier_cci_disable,
50 },
51 [UNIPHIER_SOC_PXS3] = {
52 .init = NULL,
53 .enable = NULL,
54 .disable = NULL,
55 },
56 };
57
58 static struct uniphier_cci_ops uniphier_cci_ops;
59
uniphier_cci_init(unsigned int soc)60 void uniphier_cci_init(unsigned int soc)
61 {
62 uniphier_cci_ops = uniphier_cci_ops_table[soc];
63 flush_dcache_range((uint64_t)&uniphier_cci_ops,
64 sizeof(uniphier_cci_ops));
65
66 if (uniphier_cci_ops.init)
67 uniphier_cci_ops.init();
68 }
69
uniphier_cci_enable(void)70 void uniphier_cci_enable(void)
71 {
72 if (uniphier_cci_ops.enable)
73 uniphier_cci_ops.enable();
74 }
75
uniphier_cci_disable(void)76 void uniphier_cci_disable(void)
77 {
78 if (uniphier_cci_ops.disable)
79 uniphier_cci_ops.disable();
80 }
81