1;------------------------------------------------------------------------------ 2;* 3;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR> 4;* This program and the accompanying materials 5;* are licensed and made available under the terms and conditions of the BSD License 6;* which accompanies this distribution. The full text of the license may be found at 7;* http://opensource.org/licenses/bsd-license.php 8;* 9;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 10;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 11;* 12;* 13;------------------------------------------------------------------------------ 14 15 16.const 17; 18; Float control word initial value: 19; all exceptions masked, double-extended-precision, round-to-nearest 20; 21mFpuControlWord DW 037Fh 22; 23; Multimedia-extensions control word: 24; all exceptions masked, round-to-nearest, flush to zero for masked underflow 25; 26mMmxControlWord DD 01F80h 27 28.code 29 30 31; 32; Initializes floating point units for requirement of UEFI specification. 33; 34; This function initializes floating-point control word to 0x027F (all exceptions 35; masked,double-precision, round-to-nearest) and multimedia-extensions control word 36; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero 37; for masked underflow). 38; 39InitializeFloatingPointUnits PROC PUBLIC 40 41 ; 42 ; Initialize floating point units 43 ; 44 ; The following opcodes stand for instruction 'finit' 45 ; to be supported by some 64-bit assemblers 46 ; 47 DB 9Bh, 0DBh, 0E3h 48 fldcw mFpuControlWord 49 50 ; 51 ; Set OSFXSR bit 9 in CR4 52 ; 53 mov rax, cr4 54 or rax, BIT9 55 mov cr4, rax 56 57 ldmxcsr mMmxControlWord 58 59 ret 60InitializeFloatingPointUnits ENDP 61 62END 63