1 /*++ 2 3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR> 4 5 6 This program and the accompanying materials are licensed and made available under 7 8 the terms and conditions of the BSD License that accompanies this distribution. 9 10 The full text of the license may be found at 11 12 http://opensource.org/licenses/bsd-license.php. 13 14 15 16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 17 18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 19 20 21 22 23 24 25 Module Name: 26 27 Fd.h 28 29 Abstract: 30 31 EFI Intel82802AB/82802AC Firmware Hub. 32 33 34 --*/ 35 36 37 // 38 // Supported SPI devices 39 // 40 41 // 42 // MFG and Device code 43 // 44 #define SST_25LF040A 0x0044BF 45 #define SST_25LF040 0x0040BF 46 #define SST_25LF080A 0x0080BF 47 #define SST_25VF080B 0x008EBF 48 #define SST_25VF016B 0x0041BF 49 #define SST_25VF032B 0x004ABF 50 51 #define PMC_25LV040 0x007E9D 52 53 #define ATMEL_26DF041 0x00441F 54 #define Atmel_AT26F004 0x00041F 55 #define Atmel_AT26DF081A 0x01451F 56 #define Atmel_AT25DF161 0x02461F 57 #define Atmel_AT26DF161 0x00461F 58 #define Atmel_AT25DF641 0x00481F 59 #define Atmel_AT26DF321 0x00471F 60 61 #define Macronix_MX25L8005 0x1420C2 62 #define Macronix_MX25L1605A 0x1520C2 63 #define Macronix_MX25L3205D 0x1620C2 64 65 #define STMicro_M25PE80 0x148020 66 67 #define Winbond_W25X40 0x1330EF 68 #define Winbond_W25X80 0x1430EF 69 #define Winbond_W25Q80 0x1440EF 70 71 #define Winbond_W25X16 0x1540EF // W25Q16 72 #define Winbond_W25X32 0x1630EF 73 74 // 75 // NOTE: Assuming that 8Mbit flash will only contain a 4Mbit binary. 76 // Treating 4Mbit and 8Mbit devices the same. 77 // 78 79 // 80 // BIOS Base Address 81 // 82 #define BIOS_BASE_ADDRESS_4M 0xFFF80000 83 #define BIOS_BASE_ADDRESS_8M 0xFFF00000 84 #define BIOS_BASE_ADDRESS_16M 0xFFE00000 85 86 // 87 // block and sector sizes 88 // 89 #define SECTOR_SIZE_256BYTE 0x100 // 256byte page size 90 #define SECTOR_SIZE_4KB 0x1000 // 4kBytes sector size 91 #define BLOCK_SIZE_32KB 0x00008000 // 32Kbytes block size 92 #define MAX_FLASH_SIZE 0x00400000 // 32Mbit (Note that this can also be used for the 4Mbit & 8Mbit) 93 94 // 95 // Flash commands 96 // 97 #define SPI_SST25LF_COMMAND_WRITE 0x02 98 #define SPI_SST25LF_COMMAND_READ 0x03 99 #define SPI_SST25LF_COMMAND_ERASE 0x20 100 #define SPI_SST25LF_COMMAND_WRITE_DISABLE 0x04 101 #define SPI_SST25LF_COMMAND_READ_STATUS 0x05 102 #define SPI_SST25LF_COMMAND_WRITE_ENABLE 0x06 103 #define SPI_SST25LF_COMMAND_READ_ID 0xAB 104 #define SPI_SST25LF_COMMAND_WRITE_S_EN 0x50 105 #define SPI_SST25LF_COMMAND_WRITE_S 0x01 106 107 #define SPI_PMC25LV_COMMAND_WRITE 0x02 108 #define SPI_PMC25LV_COMMAND_READ 0x03 109 #define SPI_PMC25LV_COMMAND_ERASE 0xD7 110 #define SPI_PMC25LV_COMMAND_WRITE_DISABLE 0x04 111 #define SPI_PMC25LV_COMMAND_READ_STATUS 0x05 112 #define SPI_PMC25LV_COMMAND_WRITE_ENABLE 0x06 113 #define SPI_PMC25LV_COMMAND_READ_ID 0xAB 114 #define SPI_PMC25LV_COMMAND_WRITE_S_EN 0x06 115 #define SPI_PMC25LV_COMMAND_WRITE_S 0x01 116 117 #define SPI_AT26DF_COMMAND_WRITE 0x02 118 #define SPI_AT26DF_COMMAND_READ 0x03 119 #define SPI_AT26DF_COMMAND_ERASE 0x20 120 #define SPI_AT26DF_COMMAND_WRITE_DISABLE 0x00 121 #define SPI_AT26DF_COMMAND_READ_STATUS 0x05 122 #define SPI_AT26DF_COMMAND_WRITE_ENABLE 0x00 123 #define SPI_AT26DF_COMMAND_READ_ID 0x9F 124 #define SPI_AT26DF_COMMAND_WRITE_S_EN 0x00 125 #define SPI_AT26DF_COMMAND_WRITE_S 0x00 126 127 #define SPI_AT26F_COMMAND_WRITE 0x02 128 #define SPI_AT26F_COMMAND_READ 0x03 129 #define SPI_AT26F_COMMAND_ERASE 0x20 130 #define SPI_AT26F_COMMAND_WRITE_DISABLE 0x04 131 #define SPI_AT26F_COMMAND_READ_STATUS 0x05 132 #define SPI_AT26F_COMMAND_WRITE_ENABLE 0x06 133 #define SPI_AT26F_COMMAND_JEDEC_ID 0x9F 134 #define SPI_AT26F_COMMAND_WRITE_S_EN 0x00 135 #define SPI_AT26F_COMMAND_WRITE_S 0x01 136 #define SPI_AT26F_COMMAND_WRITE_UNPROTECT 0x39 137 138 #define SPI_SST25VF_COMMAND_WRITE 0x02 139 #define SPI_SST25VF_COMMAND_READ 0x03 140 #define SPI_SST25VF_COMMAND_ERASE 0x20 141 #define SPI_SST25VF_COMMAND_WRITE_DISABLE 0x04 142 #define SPI_SST25VF_COMMAND_READ_STATUS 0x05 143 #define SPI_SST25VF_COMMAND_WRITE_ENABLE 0x06 144 #define SPI_SST25VF_COMMAND_READ_ID 0xAB 145 #define SPI_SST25VF_COMMAND_JEDEC_ID 0x9F 146 #define SPI_SST25VF_COMMAND_WRITE_S_EN 0x50 147 #define SPI_SST25VF_COMMAND_WRITE_S 0x01 148 149 #define SPI_STM25PE_COMMAND_WRITE 0x02 150 #define SPI_STM25PE_COMMAND_READ 0x03 151 #define SPI_STM25PE_COMMAND_ERASE 0xDB 152 #define SPI_STM25PE_COMMAND_WRITE_DISABLE 0x04 153 #define SPI_STM25PE_COMMAND_READ_STATUS 0x05 154 #define SPI_STM25PE_COMMAND_WRITE_ENABLE 0x06 155 #define SPI_STM25PE_COMMAND_JEDEC_ID 0x9F 156 157 #define SPI_WinbondW25X_COMMAND_WRITE_S 0x01 158 #define SPI_WinbondW25X_COMMAND_WRITE 0x02 159 #define SPI_WinbondW25X_COMMAND_READ 0x03 160 #define SPI_WinbondW25X_COMMAND_READ_STATUS 0x05 161 #define SPI_WinbondW25X_COMMAND_ERASE_S 0x20 162 #define SPI_WinbondW25X_COMMAND_WRITE_ENABLE 0x06 163 #define SPI_WinbondW25X_COMMAND_JEDEC_ID 0x9F 164 165 // 166 // SPI default opcode slots 167 // 168 #define SPI_OPCODE_WRITE_INDEX 0 169 #define SPI_OPCODE_READ_INDEX 1 170 #define SPI_OPCODE_ERASE_INDEX 2 171 #define SPI_OPCODE_READ_S_INDEX 3 172 #define SPI_OPCODE_READ_ID_INDEX 4 173 #define SPI_OPCODE_WRITE_S_INDEX 6 174 #define SPI_OPCODE_WRITE_UNPROTECT_INDEX 7 175 176 #define SPI_PREFIX_WRITE_S_EN 1 177 #define SPI_PREFIX_WRITE_EN 0 178 179 // 180 // Atmel AT26F00x 181 // 182 #define B_AT26F_STS_REG_SPRL 0x80 183 #define B_AT26F_STS_REG_SWP 0x0C 184 185 // 186 // Block lock bit definitions: 187 // 188 #define READ_LOCK 0x04 189 #define LOCK_DOWN 0x02 190 #define WRITE_LOCK 0x01 191 #define FULL_ACCESS 0x00 192 193 // 194 // Function Prototypes 195 // 196 EFI_STATUS 197 FlashGetNextBlock ( 198 IN UINTN* Key, 199 OUT EFI_PHYSICAL_ADDRESS* BlockAddress, 200 OUT UINTN* BlockSize 201 ); 202 203 EFI_STATUS 204 FlashGetSize ( 205 OUT UINTN* Size 206 ); 207 208 EFI_STATUS 209 FlashGetUniformBlockSize ( 210 OUT UINTN* Size 211 ); 212 213 EFI_STATUS 214 FlashEraseWithNoTopSwapping ( 215 IN UINT8 *BaseAddress, 216 IN UINTN NumBytes 217 ); 218 219 EFI_STATUS 220 FlashErase ( 221 IN UINT8 *BaseAddress, 222 IN UINTN NumBytes 223 ); 224 225 EFI_STATUS 226 FlashWriteWithNoTopSwapping ( 227 IN UINT8* DstBufferPtr, 228 IN UINT8* SrcBufferPtr, 229 IN UINTN NumBytes 230 ); 231 232 EFI_STATUS 233 FlashWrite ( 234 IN UINT8 *DstBufferPtr, 235 IN UINT8 *SrcBufferPtr, 236 IN UINTN NumBytes 237 ); 238 239 EFI_STATUS 240 FlashReadWithNoTopSwapping ( 241 IN UINT8 *BaseAddress, 242 IN UINT8 *DstBufferPtr, 243 IN UINTN NumBytes 244 ); 245 246 EFI_STATUS 247 FlashRead ( 248 IN UINT8 *BaseAddress, 249 IN UINT8 *DstBufferPtr, 250 IN UINTN NumBytes 251 ); 252 253 EFI_STATUS 254 FlashLockWithNoTopSwapping ( 255 IN UINT8* BaseAddress, 256 IN UINTN NumBytes, 257 IN UINT8 LockState 258 ); 259 260 EFI_STATUS 261 FlashLock( 262 IN UINT8 *BaseAddress, 263 IN UINTN NumBytes, 264 IN UINT8 LockState 265 ); 266 267 EFI_STATUS 268 CheckIfErased( 269 IN UINT8 *DstBufferPtr, 270 IN UINTN NumBytes 271 ); 272 273 EFI_STATUS 274 CheckIfFlashIsReadyForWrite ( 275 IN UINT8 *DstBufferPtr, 276 IN UINT8 *SrcBufferPtr, 277 IN UINTN NumBytes 278 ); 279