1 /*******************************************************************************
2 * Copyright (C) 2018 Cadence Design Systems, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files (the
6 * "Software"), to use this Software with Cadence processor cores only and
7 * not with any other processors and platforms, subject to
8 * the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included
11 * in all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
16 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
17 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
18 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
19 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 
21 ******************************************************************************/
22 
23 /* ...number of DSP cores */
24 #define XF_CFG_CORES_NUM                4
25 
26 /* ...maximal number of clients supported by proxy */
27 #define XF_CFG_PROXY_MAX_CLIENTS        256
28 
29 /* ...size of the shared memory pool (in bytes) */
30 #define XF_CFG_REMOTE_IPC_POOL_SIZE     (256 << 10)
31 
32 /* ...size of the component(DSP) local memory pool (in bytes) */
33 #define XF_CFG_LOCAL_POOL_SIZE          (1024<< 10)
34 
35 /* ...alignment for shared buffers */
36 #define XF_PROXY_ALIGNMENT              64
37